Integrated circuit device, electronic equipment, and method of placement of an integrated circuit device

A method of placing an integrated circuit device that includes a first macrocell which includes at least a physical-layer circuit conforming to a given interface standard for performing data transfer through a bus;

• and a second macrocell which includes a circuit in an upper layer of the physical layer, the method comprising:
• placing the first macrocell in such a manner that a corner portion of the first macrocell that is a portion at which first and second sides of the first macrocell intersect is positioned at a corner portion of the integrated circuit device;
• placing a data terminal connected to the bus of the given interface standard in a first I/O region placed along the first side of the first macrocell;
• and
• placing at least one of a clock terminal, or a power terminal of a circuit that generates a clock for data transfer through the data terminal in a second I/O region that is placed along the second side of the first macrocell.

A method of placing an integrated circuit device that includes a first macrocell which includes at least a physical-layer circuit conforming to a given interface standard for performing data transfer through a bus;

• and a second macrocell which includes a circuit in an upper layer of the physical layer, the method comprising:
• placing the first macrocell in such a manner that a corner portion of the first macrocell that is a portion at which first and second sides of the first macrocell intersect is positioned at a corner portion of the integrated circuit device,
• wherein the first macrocell comprises:
• a reception circuit which is connected to a data terminal connected to the bus of the given interface standard, and receives data through the data terminal;
• a clock generation circuit which generates a clock of a given frequency;
• and
• a sampling clock generation circuit which generates a sampling clock for data transferred through the data terminal, based on a clock generated by the clock generation circuit, and
• wherein the method further comprises:
• placing the reception circuit on a first direction side of a first I/O region placed along the first side of the first macrocell, the first direction being a direction from the first side toward a third side of the first macrocell, the third side being opposite to the first side;
• placing the clock generation circuit on a second direction side of a second I/O region placed along the second side of the first macrocell, the second direction being a direction from the second side toward a fourth side of the first macrocell, the fourth side being opposite to the second side;
• and
• placing the sampling clock generation circuit on the first direction side of the reception circuit and on the second direction side of the clock generation circuit.

A method of placing an integrated circuit device that includes a first macrocell which includes at least a physical-layer circuit conforming to a given interface standard for performing data transfer through a bus;

• and a second macrocell which includes a circuit in an upper layer of the physical layer, the method comprising:
• placing the first macrocell in such a manner that a corner portion of the first macrocell that is a portion at which first and second sides of the first macrocell intersect is positioned at a corner portion of the integrated circuit device,
• wherein the first macrocell comprises:
• a reception circuit which is connected to a data terminal connected to the bus of the given interface standard, and receives data through the data terminal;
• and
• a detection circuit which is connected to the data terminal, and detects whether or not data received through the data terminal is valid, and
• wherein the method further comprises placing the reception circuit and the detection circuit to be adjacent each other in a second direction, the second direction being a direction from the second side toward a fourth side of the first macrocell, the fourth side being opposite to the second side.

A method of placing an integrated circuit device that includes a first macrocell which includes at least a physical-layer circuit conforming to a given interface standard for performing data transfer through a bus;

• and a second macrocell which includes a circuit in an upper layer of the physical layer, the method comprising:
• placing the first macrocell in such a manner that a corner portion of the first macrocell that is a portion at which first and second sides of the first macrocell intersect is positioned at a corner portion of the integrated circuit device,
• wherein the first macrocell comprises:
• a reception circuit which is connected to a data terminal connected to the bus of the given interface standard, and receives data through the data terminal;
• and
• a transmission circuit which is connected to the data terminal, and transmits data through the data terminal, and
• wherein the method further comprising:
• placing the transmission circuit on a second direction side of the reception circuit, the second direction being a direction from the second side toward a fourth side of the first macrocell, the fourth side being opposite to the second side.

A method of placing an integrated circuit device that includes a first macrocell which includes at least a physical-layer circuit conforming to a given interface standard for performing data transfer through a bus;

• and a second macrocell which includes a circuit in an upper layer of the physical layer, the method comprising:
• placing the first macrocell in such a manner that a corner portion of the first macrocell that is a portion at which first and second sides of the first macrocell intersect is positioned at a corner portion of the integrated circuit device,
• wherein the first macrocell comprises:
• a reception circuit which is connected to a data terminal connected to the bus of the given interface standard, and receives data through the data terminal;
• and
• a transmission circuit which is connected to the data terminal, and transmits data through the data terminal, and
• wherein the method further comprises:
• placing the transmission circuit and the data terminal to be adjacent in the first direction, the first direction being a direction from the first side toward a third side of the first macrocell, the third side being opposite to the first side.