Back to results
US 2002/0171456 A1Published application
Setting the speed of clocked circuitry
AssigneeIntel Corporation
InventorGary A. Solomon
Life of this patent
Estimating the term…
Abstract
A way is disclosed of establishing at system reset of both physical operating speed limitations imposed on a secondary bus by a circuit layout as well as the speed capabilities of agents attached to the bus, so that a secondary bus clock speed may be set at the highest permissible speed existing at the time of system reset.
Claims26
A method comprising
- sensing a state at a first input of an electronic circuit, the state comprising one of at least two logical conditions;
- and
- based upon the state of the first input, setting a variable frequency output of the electronic circuit to a predetermined frequency.
A system comprising
- a bridge circuit having
- a first input capable of sensing at least two logical states;
- a variable frequency output;
- the bridge being configured to sample the first input, and, based upon the sampling, to set the variable frequency output to a predetermined frequency base.
1 more element
An article of manufacture comprising
- an integrated circuit comprising a bridge;
- the bridge having a first input capable of sensing at least two logical states and deriving a variable frequency output;
- the bridge having electronic circuitry configured to cause the bridge to sense the first input, and based upon the sensing, to set the output to at least one predetermined frequency.
Dependencies are inferred from the claim text.