Dc testing apparatus and semiconductor testing apparatus

A semiconductor testing apparatus equipped with a DC testing apparatus, wherein:

• said DC testing apparatus comprises:
• a pattern generator for generating a test pattern to be input to a device under test, and for outputting an AD start signal for each test pattern;
• a sequencer for outputting a start signal, a timing signal, a write-in signal, and a clock signal sequentially, when said AD start signal is input;
• an analog/digital converter for measuring an output of said DUT to which the test pattern is input, when said start signal is input;
• an arithmetic/logical unit for outputting an output voltage value of said analog/digital converter as a measurement value, when said timing signal is input, and for outputting a result of comparing the output voltage value with an expected value to said pattern generator as a PASS/FAIL signal;
• an address counter for updating an address value to be output, when said clock signal is input;
• and
• a history memory for storing the measurement value in an address indicated by said address value, when said write-in signal is input.