Semiconductor device and method of manufacturing the device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsTakaaki Murakami, Kazuyuki Sugahara
Life of this patent
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Abstract
A field-effect transistor including N−-extension regions, an N+-drain region, an N+-source region and a gate electrode is formed at a surface of a silicon substrate. A sidewall insulating film formed on one of the opposite side surfaces of the gate electrode partially covers the surface of the N−-extension region, and a sidewall insulating film formed on the side surface entirely covers the N−-extension region. Further, a silicon oxide film covers the surface of N−-extension region not covered with the sidewall insulating film. Thereby, resistances of the gate electrode, source region and drain region can be easily reduced in a transistor having extension regions, which are asymmetrical with respect to the gate electrode.
Claims14
A semiconductor device comprising:
- a semiconductor substrate having a main surface;
- an electrode formed on said semiconductor substrate with an insulating film therebetween, and having opposite side surfaces and a top surface;
- a first impurity region of a predetermined conductivity type formed at the surface of said semiconductor substrate, extending substantially from a position immediately under one of the opposite side surfaces of said electrode away from said electrode and having a first length on the surface of said semiconductor substrate;
- a second impurity region of said predetermined conductivity type formed at the surface of said semiconductor substrate, extending substantially from a position immediately under the other side surface of said electrode away from said electrode and having a second length on the surface of said semiconductor substrate shorter than said first length;
- a third impurity region of said predetermined conductivity type formed at the surface of said semiconductor substrate, extending from a position neighboring to said first impurity region away from said electrode and having a higher impurity concentration than said first impurity region;
- a fourth impurity region of said predetermined conductivity type formed at the surface of said semiconductor substrate, extending from a position neighboring to said second impurity region away from said electrode and having a higher impurity concentration than said second impurity region;
- and
- a metal silicide layer formed at least at a portion of said top surface of said electrode and the surfaces of said third and fourth impurity regions.
A method of manufacturing a semiconductor device comprising the steps of:
- forming an electrode having opposite side surfaces and a top surface on a semiconductor substrate with a first insulating film therebetween;
- forming, at the surface of said semiconductor substrate, a first impurity region of a predetermined conductivity type extending substantially from a position immediately under one of the opposite side surfaces of said electrodes away from said electrode, and a second impurity region of said predetermined conductivity type extending substantially from a position immediately under the other side surface of said electrode away from said electrode;
- forming, at the surface of said semiconductor substrate, a third impurity region of said predetermined conductivity type having a higher impurity concentration than said first impurity region, being in contact with said first impurity region and spaced by a first length on the surface of said semiconductor substrate substantially from a position immediately under one of said opposite side surfaces, and a fourth impurity region of said predetermined conductivity type having a higher impurity concentration than said second impurity region, being in contact with said second impurity region and spaced by a second length shorter than said first length on the surface of said semiconductor substrate substantially from a position immediately under the other side surface of said electrode;
- and
- forming a metal silicide layer at each of the surfaces of said third and fourth impurity regions and the top surface of said electrode, wherein
- after forming said first and second impurity regions, and before forming said metal silicide layer, processing is performed to form a protection film covering at least the surfaces of said first and second impurity regions for preventing silicidation of said first and second impurity regions when forming said metal silicide layer at each of the surfaces of said first and second impurity regions.
Dependencies are inferred from the claim text.