Method for forming a semiconductor device having elevated source and drain regions
OwnerBaohong Cheng, Yeong-Jyh T. Liiinventors
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Abstract
Epitaxial silicon is grown to form elevated source/drain extensions for transistors on silicon-on-insulator (SOI) substrates. An offset linear layer is formed between the gate and the epitaxial silicon to prevent shorting. In one embodiment, the offset linear layer is a nitride and in another embodiment it is an oxide. The resulting structure decreases extension resistance and improves the scalability of SOI transistors by increasing the thickness of silicon underneath the source and drain regions, while keeping the silicon underneath the gate thin. This allows for the reduction in gate length without decreasing the functionality of the transistor.
Claims21
A method for forming a semiconductor device, comprising:
- forming a buried oxide layer on a surface of a silicon substrate;
- forming an silicon-on-insulator (SOI) layer on the surface of the buried oxide layer;
- forming a gate dielectric over the SOI layer;
- forming a gate electrode on the gate dielectric and defining an active region around the gate electrode;
- depositing an insulating layer over the gate electrode;
- etching the insulating layer to form an offset liner around the gate electrode;
- growing a silicon layer on the active region by epitaxial growth;
- forming source/drain regions in the SOI layer;
- forming an etch stop layer over the source/drain regions and on a side of the gate electrode;
- forming a sidewall spacer over the etch stop layer;
- and
- forming a silicide layer over the source/drain regions.
A method for forming a silicon-on-insulator (SOI) semiconductor device, comprising:
- depositing an insulating layer over a gate electrode;
- etching the insulating layer to form an offset liner around the gate electrode;
- growing a silicon layer on an active region of a semiconductor substrate by epitaxial growth;
- forming source/drain regions in a SOI layer;
- forming an etch stop layer over the source/drain regions and on a side of the gate electrode;
- and
- forming a sidewall spacer over the etch stop layer.
A semiconductor device, comprising:
- a silicon-on-insulator (SOI) layer;
- a gate electrode formed over the SOI layer;
- an insulating layer formed over the gate electrode;
- an offset liner formed along the sidewalls of the gate electrode by etching the insulating layer;
- an epitaxial silicon layer grown on an active region of the SOI layer;
- a source/drain region formed in the SOI layer;
- and
- a sidewall spacer formed around the gate electrode.
Dependencies are inferred from the claim text.