High voltage N-channel LDMOS devices built in a deep submicron CMOS process
AssigneeVirtual Silicon Technology, Inc.
InventorGregorio Spadea
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Abstract
A novel Laterally Diffused NMOS device is described. With proper design the drain terminal of this device can be raised to a much higher voltage that the maximum allowed gate voltage of the CMOS technology into which the device is built. The device can be built in a conventional deep submicron CMOS technology as used for the 0.25 um node and beyond without additional masks or dedicated processing steps. When a deep N-well mask and ion implantation is added to the process, the device can be operated with a body voltage positive above ground. This device can be used like a conventional LDMOS for circuits which require a device capable of switching voltages which exceed the rating of conventional CMOS devices by using as low voltage input signal.
Claims23
A High voltage Laterally Diffused MOS device comprising:
- a silicon substrate;
- an isolation oxide field on said substrate;
- and
- a substantially vertical interface between said silicon substrate and said isolation oxide field.
2 The high voltage Laterally Diffused MOS device of claim 1 wherein said isolation oxide field is applied using Shallow Trench Isolation (STI).
The device of claim 2 wherein said oxide isolation field comprises:
- a trench in said silicon substrate;
- and
- an insulator filling said trench.
A method for manufacturing a high voltage Laterally Diffused MOS comprising:
- defining a silicon substrate;
- and
- applying a field oxide isolation using Shallow Trench Isolation (STI).
Dependencies are inferred from the claim text.