Flash memory structure having double celled elements and method for fabricating the same
AssigneeInternational Business Machines Corporation
InventorsLouis L. Hsu, Rajiv V. Joshi, Carl Radens, Jack A. Mandelman, William R. Tonti
Life of this patent
Estimating the term…
Abstract
A flash memory array having a plurality of bitlines, at least one wordline and a plurality of flash memory flash memory elements, wherein each flash memory element includes two transistors for storing two bits, and wherein each flash memory element is positioned between a pair of adjacent bitlines. A method is also presented for fabricating the flash memory array having the plurality of flash memory elements, wherein each flash memory element is configured for storing two bits.
Claims36
A flash memory system comprising a plurality of flash memory elements arranged in an array and a plurality of bitlines traversing the array, each flash memory element configured for storing at least two bits of data.
A flash memory array comprising:
- a plurality of bitlines;
- a plurality of wordlines;
- a plurality of flash memory elements, wherein each flash memory element includes at least two transistors, and wherein each flash memory element is positioned between a pair of adjacent bitlines of the plurality of bitlines.
A method for fabricating a flash memory array having a plurality of flash memory elements, the method comprising the steps of:
- providing a substrate;
- and
- simultaneously fabricating a first gate portion and a second gate portion of each of the flash memory elements of the plurality of flash memory elements on the substrate.
Dependencies are inferred from the claim text.