Integrated CMOS structure for gate-controlled buried photodiode

A pixel fabricated as an integrated circuit in the active surface of a semiconductor substrate of a first conductivity type, selected portions of said surface protected by an insulator, comprising:

• a light-sensing diode comprising a first well of said first conductivity type, shaped as an annulus having side walls, said side walls at least partially surrounding a second well of the opposite conductivity type, thereby forming junctions with said first well, at least one of said junctions reaching a surface portion unprotected by said insulator;
• said second well having a first gate positioned on a gate oxide, such that it extends across regions of both first and second wells, thus extending across said junction at said unprotected surface, said gate operable to control the sensing and reset modes of said diode;
• said second well further forming junctions with said substrate remote from said surface;
• a first MOS transistor, operable as a reset switch, having source, drain and gate terminals;
• a second MOS transistor, operable as the sensing transistor, merged with said first transistor such that the source of said second transistor is combined with said drain of said first transistor, and the gate of said second transistor is electrically connected with said source of said first transistor;
• and
• means for applying electrical bias across said diode junctions and to said transistor terminals.