PCI bar target operation region

Abstract

Described is a system and method by which a PCI device may be controlled by firmware in an Advanced Configuration and Power Management system. A device connected to the PCI bus is described in firmware with AML that declares a PCI BAR operation region associated with the PCI device. A generic driver is loaded and registers itself to handle any access to or from the PCI device my means of the PCI BAR operation region. Essentially, the generic driver is enumerated as a functional driver (FDO) for the PCI device. When a Plug-n-Play manager assigns base addresses to each PCI device on the PCI bus, the generic driver stores this information. Calls by the firmware to the PCI BAR operation region identify the PCI BAR number (i.e., the PCI device) and give an offset. The generic driver resolves that information into an absolute memory or I/O address based on the current BAR assigned by the PnP manager and performs the requested access.

Dependencies are inferred from the claim text.