Equipotential fault tolerant integrated circuit heater

In combination with an electronic component containing at least one semiconductor device mounted to a multi-layer substrate, said substrate including a bottom layer for bonding said electronic component to a printed wiring board, a fault tolerant heater supported on an upper surface of said bottom layer of said substrate, said fault tolerant heater comprising:

• first and second elongate conductor traces formed on said upper surface positioned in spaced relationship extending across said bottom layer of said substrate and defining a surface region there between;
• a plurality of columns of conductor traces formed on said upper surface of said multi-layer substrate, said columns being positioned side-by-side, one end of each column being in contact with a first of said elongate conductor traces and an opposite end of each column being in contact with a second one of said elongate conductor traces, said columns including a first column, a last column and intermediate columns between said first and last columns;
• each column in said plurality of columns further comprising:
• a set of closed conductor loops, said set of closed conductor loops including an initial closed conductor loop, a final closed conductor loop, and a number of intermediate loops;
• said initial closed conductor loop including a side formed by said first elongate conductor trace, and an opposed side shared in common with an intermediate closed conductor loop next in position in said set;
• said final closed conductor loop including a side formed by said second elongate conductor trace, and an opposed side shared in common with an intermediate closed conductor loop immediately preceding in position in said set;
• and each intermediate closed conductor loops sharing one side with at least one of said intermediate closed conductor loops or said initial closed conductor loop and sharing an opposed side with at least another one of said intermediate closed conductor loops;
• and wherein
• each closed conductor loop of an intermediate column sharing a side or portion of a side with at least one closed conductor loop of another column positioned to one side and sharing another side or portion of a another side with at least one closed conductor loop of still another column positioned on an opposite side of said intermediate column.

In a electronic semiconductor component, said semiconductor component including a semiconductor chip, said semiconductor chip including a plurality of electrical interface leads, and a multi-layer substrate having a predetermined area for supporting said semiconductor chip on a printed circuit board, said multi-layer substrate having dimensions defining said predetermined area, said multi-layer substrate comprising a laminate of layers of a predetermined material, said multi-layer substrate including first electrical connections for electrical connection to said electrical interface leads of said semiconductor chip and second electrical connections for electrical connection to pre-defined locations upon said printed circuit board, said lower most layer of said multi-layer substrate comprising a plurality of electric heaters connected electrically in parallel for producing heat uniformly over said predetermined area, said heat being sufficient to weaken said second electrical connections to said printed circuit board and being insufficient to delaminate layers of said multi-layer substrate from one another or to weaken said first electrical connections, each of said electric heaters being of the same predetermined length and extending between first and second power supply bus bars extending along opposed edges of said lower most layer of said multi-layer substrate, the improvement therein wherein said lower most layer of said multi-layer substrate further comprises:

• a plurality of electrical buses, said buses being capable of generating heat responsive to current flow there through;
• said plurality of buses being connected between a respective one of said electric heaters and another one of said electric heaters located adjacent to said one of said electric heaters at distinctive spaced locations along said electric heaters and oriented parallel to said first and second power supply bus bars, wherein said buses are symmetrically distributed about said multi-layer substrate;
• whereby during operation of said plurality of heaters a pair of adjacent ones of said electrical buses routes current from said one of said heaters through a portion of an adjacent heater on the occurrence of a break in said one electric heater and back into said one of said heaters, when said break in said one heater is located between said pair of electrical buses.