Suppression of n-type autodoping in low-temperature Si and SiGe epitaxy
AssigneeKoninklijke Philips Electronics N.V.
InventorWiebe Barteld De Boer
Life of this patent
Estimating the term…
Abstract
A method of manufacturing a semiconductor device, which method comprises the step of epitaxially growing a stack comprising an n-type doped layer of a semiconductor material followed by at least one further layer of a semiconductor material, the stack being grown in one continuous growth cycle.
Claims12
A method of manufacturing a semiconductor device, which method comprises the step of epitaxially growing a stack comprising an n-type doped layer of a semiconductor material followed by at least one further layer of a semiconductor material, the stack being grown in one continuous growth cycle.
A method as claimed in any one of the preceding claims, wherein either silicon or a silicon-germanium alloy or a silicon-germanium-carbon alloy is applied as the semiconductor material of the n-type doped layer.
A method as claimed in any one of the preceding claims, wherein either silicon or a silicon-germanium alloy or a silicon-germanium-carbon alloy is applied as the semiconductor material of the at least one further layer.
A method as claimed in any one of the preceding claims, wherein the n-type doped layer is grown using an n-type dopant gas, for which a phosphorus-containing compound or an arsenic-containing compound is applied.
A method as claimed in any one of the preceding claims, wherein the growth process is performed at a temperature below about 800° C.
A method as claimed in any one of the preceding claims, wherein the semiconductor device comprises a heterojunction bipolar transistor.
Dependencies are inferred from the claim text.