Multiple memory block disable function
OwnerCharles E. Watts JR.inventor
Life of this patent
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Abstract
An apparatus and method of providing a multiple memory block disable function in a microcontroller system. The multiple memory block disable function allows a customer to protect its micro-code from being altered or copied. An exemplary apparatus includes a processor, a first memory block in communication with the processor, a second memory block in communication with the processor, and a disable circuit, operable to disable the first memory block following a first programming operation and disable the second memory block following a second programming operation.
Claims15
A method of disabling multiple memory blocks in a microcontroller system, comprising the steps of:
- programming a first set of data into a first memory block;
- disabling read and write access to the programmed first memory block;
- programming a second set of data into a second memory block;
- and
- disabling read and write access to the second memory block.
A microcontroller system, comprising:
- a processor
- a first memory block in communication with the processor;
- a second memory block in communication with the processor;
- and
- a register in communication with the first and second memory blocks, the register having two or more disable bits that control a read or write access to the first and second memory blocks.
A microcontroller system, comprising:
- a processor;
- a first memory block in communication with the processor;
- a second memory block in communication with the processor;
- and
- a disable circuit, in communication with the processor, operable to disable the first memory block following a first programming operation and disable the second memory block following a second programming operation.
Dependencies are inferred from the claim text.