Replacement data error detector
AssigneeBroadcom Corporation
InventorErik P. Supnet
Life of this patent
Estimating the term…
Abstract
A cache includes an error circuit for detecting errors in the replacement data. If an error is detected, the cache may update the replacement data to eliminate the error. For example, a predetermined, fixed value may be used for the update of the replacement data. Each of the cache entries corresponding to the replacement data may be represented in the fixed value. In one embodiment, the error circuit may detect errors in the replacement data using only the replacement data (e.g. no parity or ECC information may be used). In this manner, errors may be detected even in the presence of multiple bit errors which may not be detectable using parity/ECC checking.
Claims36
A cache comprising:
- a memory configured to store replacement data corresponding to a plurality of cache entries;
- and
- a circuit coupled to receive the replacement data from the memory, wherein the circuit is configured to determine whether or not at least one of the plurality of cache entries is not represented in the replacement data.
A method comprising:
- receiving replacement data corresponding to a plurality of cache entries;
- and
- determining whether or not at least one of the plurality of cache entries is not represented in the replacement data.
A cache comprising:
- a memory configured to store replacement data corresponding to a plurality of cache entries, the replacement data indicating an order of the plurality of cache entries for replacement;
- and
- a circuit coupled to the receive the replacement data from the memory, wherein the circuit is configured to detect an error in the order if a different one of the plurality of cache entries is not indicated at each position in the order.
A cache comprising:
- a memory configured to store replacement data corresponding to a plurality of cache entries;
- and
- a circuit coupled to receive the replacement data from the memory, wherein the circuit is configured to decode the replacement data to detect an error therein.
A cache comprising:
- a memory configured to store replacement data corresponding to a plurality of cache entries;
- and
- a circuit coupled to receive the replacement data from the memory, wherein the circuit is configured to detect an error in the replacement data using only the replacement data.
Dependencies are inferred from the claim text.