Method for implementing soft-DMA (software based direct memory access engine) for multiple processor systems
OwnerJason Seung-Min Kiminventor
Life of this patent
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Abstract
A software-based direct memory access (DMA) engine for a multiple processor system eliminates the overhead and limitations associated with conventional hardware DMA engines. In a preferred embodiment, the DMA engine is implemented in a two processor system that includes separate processor buses and uses a store multiple data locations instruction in combination with a load multiple data locations instruction.
Claims10
A computer system, comprising:
- a first processor;
- a second processor;
- and
- a direct memory access (DMA) engine capable of being executed by one of the first and second processors, the DMA engine capable of transferring data between one or more resources in the computer system.
A computer implemented direct memory access apparatus that operates in a computer system having two or more processors, the apparatus comprising:
- a load multiple data instruction capable of being executed by a processor in the computer system for loading data from multiple locations in a resource into multiple locations in an internal register in the processor;
- and
- a store multiple data instruction capable of being executed by the processor in the computer system for storing data from multiple locations in the internal registers in the processor into multiple locations in a memory.
A computer implemented direct memory access apparatus that operates in a computer system having two or more processors, the apparatus comprising:
- a load multiple data instruction capable of being executed by a processor in the computer system for loading data from multiple locations in a resource into multiple locations in an internal register in the processor;
- and
- a store multiple data instruction capable of being executed by the processor in the computer system for storing data from multiple locations in the internal registers in the processor into multiple locations in a memory;
- and
- a data buffer FIFO capable of accepting multiple data transfers to and from any of its alias addresses.
Dependencies are inferred from the claim text.