Plasma enhanced liner
AssigneeInternational Business Machines Corporation
InventorWILLIAM J. MURPHY
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Abstract
It is, an object of the present invention to provide a process of forming a refractory metal liner that includes depositing a layer of refractory metal on a first conductive layer, where at least half of the depositing is carried out in the presence of an amount of passivating agent that is sufficient to impede subsequent reaction of at least a top half of the layer of refractory metal with the first conductive layer and is less than an amount of passivating agent necessary to form a stoichiometric refractory metal with the passivating agent. The process also includes annealing the refractory metal and the first conductive layer in a first element ambient, thereby forming a stoichiometric refractory metal with the first element in at least a portion of the top half of the layer of refractory metal.
Claims32
A process of forming a refractory metal liner, comprising:
- depositing a layer of refractory metal on a first conductive layer, at least half of said depositing being carried out in the presence of an amount of passivating agent that is sufficient to impede subsequent reaction of at least a top half of said layer of refractory metal with said first conductive layer and is less than an amount of passivating agent necessary to form a stoichiometric refractory metal compound with said passivating agent;
- and
- annealing said refractory metal and said first conductive layer in a first element ambient, thereby forming a stoichiometric refractory metal with said first element in at least a portion of said top half of said layer of refractory metal.
A process of forming an electrical connection in an integrated circuit chip, said process comprising:
- depositing a liner on a first conductive layer, a portion of said depositing being carried out in the presence of a passivating material, wherein said passivating material combines with said liner to form a barrier, said barrier impeding impurities from diffusing from said first conductive layer through said liner,
- annealing said liner and said first conductive layer in a first element ambient;
- and
- forming a second conductive layer over said liner, wherein said barrier impedes said impurities from diffusing from said second conductive layer through said liner during said forming of said second conductive layer.
A process of forming an integrated circuit chip comprising:
- depositing a liner on a first conductive layer, a portion of said depositing being carried out in the presence of a passivating material, wherein said passivating material combines with said liner to form a barrier, said barrier impeding impurities from diffusing from said first conductive layer through said liner,
- annealing said liner and said first conductive layer in a first element ambient;
- and
- forming a second conductive layer over said liner, wherein said barrier impedes said impurities from diffusing from said second conductive layer through said liner during said forming of said second conductive layer.
A refractory metal liner, comprising:
- a barrier comprising a passivating agent, said barrier impending a subsequent reaction of at least a top half of said refractory metal liner with an adjacent conductive layer, an amount of said passivating agent in said barrier being less than an amount necessary to form a stoichiometric combination of said refractory metal liner and said passivating agent.
An electrical connection in an integrated circuit chip, said electrical connection comprising:
- a first conductive layer;
- a liner on said first conductive layer, said liner including a barrier, said barrier impeding impurities from diffusing from said first conductive layer through said liner;
- and
- a second conductive layer over said liner, wherein said barrier impedes said impurities from diffusing from said second conductive layer through said liner.
An integrated circuit chip comprising:
- a first conductive layer;
- a liner on said first conductive layer, said liner including a barrier, said barrier impeding impurities from diffusing from said first conductive layer through said liner,
- a second conductive layer over said liner, wherein said barrier impedes said impurities from diffusing from said second conductive layer through said liner.
Dependencies are inferred from the claim text.