Method for forming dual gate of a semiconductor device

A method of forming a dual gate of a semiconductor device, the method comprising:

• forming a gate oxide layer on a semiconductor substrate having defined active and field regions by a prior formation of a field oxide layer;
• depositing an undoped polysilicon layer on the gate oxide layer;
• forming a photoresist mask on one side of a top surface of the undoped polysilicon layer;
• defining an N-doped polysilicon region and an undoped polysilicon region by injecting N+ ion into another side of the top surface of the undoped polysilicon layer not covered by the photoresist mask;
• forming a dual gate mask pattern on top of the N-doped polysilicon and undoped polysilicon regions;
• first-etching the N-doped and undoped polysilicon regions by performing a photo etching by using the dual gate mask pattern and a plasma comprising fluorine-containing gas and a halogen gas;
• second-etching by etching until the gate oxide layer beneath the N-doped and undoped polysilicon regions is exposed using the dual gate mask pattern and a gas comprising a halogen gas and an inert gas;
• third-etching by etching the N-doped polysilicon and undoped polysilicon regions excessively with an etching condition of high selectivity to the gate oxide layer by using the dual gate mask pattern and a gas comprising a halogen gas and an inert gas;
• and
• forming a dual gate by removing the dual gate mask pattern.