Input buffering and queue status-based output control for a digital traffic switch
AssigneeAlcatel
InventorsJohn D. Wallner, Chris L. Hoogenboom, Michael J. Nishimura, Michael K. Wilson
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AssigneeAlcatel
InventorsJohn D. Wallner, Chris L. Hoogenboom, Michael J. Nishimura, Michael K. Wilson
Estimating the term…
A digital traffic switch having DIBOC buffer control has a queue status-based control strategy to limit status traffic on the switch and status buffer requirements. Status messages are transmitted from inputs to outputs when the content status of a logical output queue has changed from “empty” to “not empty”, or vice versa, rather than on a “per cell” request basis. Status messages are transmitted from outputs to inputs when the clearance status of a logical output queue has changed from “not clear to release” to “clear to release”, or vice versa, rather than on a “per cell” grant basis. The status of each logical output queue is monitored at outputs by retaining and updating a single status bit which has a particular binary value when the logical output queue's status is “empty” and the opposite binary value when the logical output queue's status is “not empty”. The status of each logical output queue is monitored at inputs by retaining and updating a single status bit which has a particular binary value when the logical output queue's status is “not clear to release” and the opposite binary value when the logical output queue's status is “clear to release”. Outputs generate (but do not transmit) release grants in a logical order determined by running a grant generation algorithm. Inputs release discrete information units in a logical order determined by running a release algorithm. Status messages for logical output queues are re-transmitted when extra bandwidth is available to remove any inaccurate view of the status of the logical output queues resulting from transmission failures of the original status messages.
A method of controlling buffering of a discrete information unit of digital data for use within a digital switch having multiple source input ports, multiple destination output ports, and a switch fabric for switching a discrete information unit received at any of the source input ports to any of the destination output ports, wherein each source input port is associated with an input unit including an input buffer having a plurality of logical output queues and wherein each destination output port is associated with an output unit, the method comprising:
A method of controlling buffering of a discrete information unit of digital data for use within a digital switch having multiple source input ports, multiple destination output ports, and a switch fabric for switching a discrete information unit received at any of the source input ports to any of the destination output ports, wherein each source input port is associated with an input unit including an input buffer having a plurality of logical output queues and wherein each destination output port is associated with an output unit, the method comprising:
A digital switch for controlling buffering of a discrete information unit of digital data, the digital switch comprising:
A digital switch for controlling buffering of a discrete information unit of digital data, the digital switch comprising:
Dependencies are inferred from the claim text.