Display device

A display device comprising:

• a gate signal line;
• a pixel element portion;
• a plurality of pixel element selection transistors each selecting the pixel element portion in response to a scanning signal inputted from the gate signal line;
• a drain signal line receiving a digital image signal;
• a data retaining portion retaining the digital image signal inputted through the pixel element selection transistors;
• a pixel element electrode;
• a plurality of capacitance electrodes each forming a capacitance coupling with the pixel element electrode based on respective predetermined weighed capacitance ratios;
• and
• a clock supplier portion for supplying a cyclical clock signal to the capacitance electrodes in response to the digital image signal retained in the data retaining portion;
• wherein the selection transistors, the data retaining portion, the pixel element electrode, the capacitance electrodes and the clock supplier portion are disposed in the pixel element portion.

A display device comprising:

• a plurality of pixel elements;
• and
• a plurality of pixel element electrodes disposed in the respective pixel elements, each of the pixel element electrodes facing a plurality of a capacitance electrodes electrically insulated from the pixel element electrode and each forming capacitance coupling with the corresponding pixel element electrode based on respective predetermined weighed capacitance ratios;
• wherein a voltage applied to each pixel element electrode is changed by applying a voltage corresponding to a digital image signal to each of the capacitance electrodes of the corresponding pixel element electrode.

A display device comprising;

• a plurality of pixel elements;
• a plurality of pixel element electrodes disposed in the respective pixel elements, each of the pixel element electrodes facing a plurality of capacitance electrodes electrically insulated from the pixel element electrode and each forming a capacitance coupling with the pixel element electrode based on respective predetermined weighed capacitance ratios;
• a plurality of clock supplier portions supplying a cyclic clock signal in response to a digital image signal to the capacitance electrodes, the clock supplier portions being disposed in the corresponding pixel elements;
• a plurality of clock signal selection portions selecting the clock signal according to a voltage corresponding to the highest bit of the digital image signal, the clock signal selection portions being disposed in the corresponding pixel elements;
• and
• a plurality of reset signal supplier portions selecting a reset signal and supplying the reset signal to the corresponding pixel element electrodes according to a voltage corresponding to the highest bit of the digital image signal, the reset signal supplier portions being disposed in the corresponding pixel elements.