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AssigneeKoninklijke Philips Electronics N.V.
InventorsRoeland John Heijna, Johannes Petrus Antonius Frambach
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A ring oscillator according to the invention comprises a closed chain of at least two modules (1, 2). At least one of the modules (1, 2) comprises a primary (10) and a secondary amplifier stage (11) and combination means (12) for combining output signals of the primary (10) and the secondary amplifier stage (11) so as to generate an output signal of the module. The amplifier stages (10, 11) have a mutually different delay and the primary (10) and the secondary amplifier stage (11) are each coupled to an input (13) of the module (1). The ring oscillator further comprises a control unit (4) for generating a first (C1) and a second auxiliary control signal (C2) for controlling the amplification of the primary amplifier stage (10) and the secondary amplifier stage (11) in response to an input control signal (Co) representative for a desired frequency for the ring oscillator. The ring oscillator according to the invention is in particular suitable for application in a data and clock recovery unit (DCR), for example in a receiver for a transmission channel and a device for reproducing an information carrier.
Ring oscillator comprising a closed chain of at least two modules (1, 2), characterised in that at least one of the modules (1, 2) comprises a primary (10) and a secondary amplifier stage (11) and combination means (12) for combining output signals of the primary (10) and the secondary amplifier stage (11) so as to generate an output signal of the module, the amplifier stages (10, 11) having a mutually different delay, the primary (10) and the secondary amplifier stage (11) each being coupled to an input (13) of the module (1), the ring oscillator further comprising a control unit (4) for generating a first (C1) and a second auxiliary control signal (C2) for controlling the amplification of the primary amplifier stage (10) and the secondary amplifier stage (11) in response to an input control signal (Co) representative for a desired frequency for the ring oscillator.
Data and clock recovery unit DCR comprising a phase detector (5) having a first input (5a) coupled to an input (IN) of the DCR, the phase detector (5) having a second input (5b) and having an output (5c) coupled to a controllable oscillator (7) according to one of the previous claims, the second input (5b) of the phase detector (5) being coupled to an output of the controllable oscillator (7) via feedback means (8), the DCR further comprising a data detecting unit (9) for generating a sampled output signal (Sout) having a first input (9a) coupled to the input (IN) of the DCR and a second input (9b) coupled the output (7a) of the controllable oscillator (7).
Dependencies are inferred from the claim text.