Trans-admittance trans-impedance logic for integrated circuits
AssigneeLucent Technologies Inc.
InventorsRajasekhar Pullela, Mario Reinhold
Life of this patent
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Abstract
A logic circuit with improved performance when operating at the limits of the transistor's bandwidth. In particular, a latch includes a clocked trans-admittance stage circuit for receiving a voltage and producing a current output, and an active load, such as a trans-impedance stage circuit, connected to receive as input the current output of the trans-admittance stage circuit and produce a voltage output. Two independent trans-admittance and trans-impedance stages may be combined as a single latch pair. One or more latch pairs may be arranged in series as a cascaded chain and connected to the output current of a clocked trans-admittance stage latch.
Claims16
A latch comprising:
- a clocked trans-admittance stage circuit for receiving a voltage and producing a current output;
- and
- an active load connected to receive as input the current output of said trans-admittance circuit and produce a voltage output.
A cascaded latch chain comprising:
- a clocked trans-admittance stage latch receiving an input voltage and producing an output current.
A latch pair comprising:
- two independent combined trans-admittance and trans-impedance stages.
Dependencies are inferred from the claim text.