Pad calibration circuit with on-chip resistor
AssigneeCicada Semiconductor, Inc.
InventorsNicholas van Bavel, Pradeep Katikaneni
Life of this patent
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Abstract
A pad calibration circuit with on-chip resistor. An integrated circuit with an impedance terminated output terminal is disclosed. A source is provided for sourcing current to the output terminal of the integrated circuit, which output terminal interfaces with a load having a finite impedance associated therewith. An on-chip source impedance is disposed internal to the integrated circuit and between the source and the output terminal to define the input impedance of the output terminal.
Claims87
An integrated circuit with an impedance terminated output terminal, comprising:
- a source for sourcing current to the output terminal of the integrated circuit, which output terminal interfaces with a load having a finite impedance associated therewith, and
- an on-chip source impedance disposed internal to the integrated circuit and between said source and the output terminal to define the source impedance of the output terminal.
An integrated circuit with an impedance terminated output terminal, comprising:
- a source for sourcing current to the output terminal of the integrated circuit and a sink for sinking current from the output terminal, which output terminal interfaces with a load having a finite impedance associated therewith;
- an input signal having first and second logic states;
- and
- an on-chip source impedance disposed internal to the integrated circuit and switchable between said source and the output terminal in the presence of said first logic state of said input signal to define the source impedance of the output terminal in the presence of said first logic state of said input signal, and between said sink and the output terminal in the presence of said second logic state of said input signal to define the source impedance of the output terminal in the presence of said second logic state of said input signal.
An integrated circuit with an output terminal having a calibrated source impedance comprising an on-chip impedance with a value that is fixed to substantially equal an expected finite load impedance, which said on-chip impedance defines the source impedance to the integrated circuit at the output terminal.
The integrated circuit of claim32, wherein said output signal switches between at high frequency and said switchable impedance is operable to switch at said high frequency, and said load impedance comprises a transmission line of a finite impedance at the high frequency.
An integrated circuit with a plurality of calibrated impedance terminated output terminals for transmitting data at a defined rate, comprising:
- an on-chip source impedance associated with each of the output terminals and each disposed internal to the integrated circuit to define the input impedance thereof;
- each of said on-chip source impedances variable in response to an associated control signal;
- and
- a calibration circuit for determining the value of said control signal for each of said on-chip source impedances, thereby defining the value of each of said on-chip source impedances in accordance with the calibration of said on-chip source impedances to calibrate for predetermined characteristics thereof.
An assembly on a substrate, comprising:
- a first integrated circuit disposed proximate to the substrate and having a signal output for providing an output signal;
- a second integrated circuit disposed on the substrate and having a signal input for receiving an input signal;
- a transmission line disposed between said signal output of said first integrated circuit and said signal input of said second integrated circuit, such that the combination of said transmission line and said signal input of said second integrated circuit presents a terminating impedance to said signal output of said first integrated circuit;
- and
- an impedance matching device disposed on said first integrated circuit for impedance matching said signal output of said first integrated circuit to said terminating impedance.
A method for impedance terminating an output terminal on an integrated circuit, comprising the steps of:
- sourcing current with a source to the output terminal of the integrated circuit, which output terminal interfaces with a load having a finite impedance associated therewith, and
- disposing an on-chip source impedance internal to the integrated circuit and between the source and the output terminal to define the source impedance of the output terminal.
An method for impedance terminating an output terminal of an integrated circuit, comprising the steps of:
- sourcing current with a source to the output terminal of the integrated circuit and sinking current from the output terminal with a sink, which output terminal interfaces with a load having a finite impedance associated therewith;
- providing an input signal having first and second logic states;
- and
- disposing an on-chip source impedance internal to the integrated circuit and switchable between the source and the output terminal in the presence of the first logic state of the input signal to define the source impedance of the output terminal in the presence of the first logic state of the input signal, and between the sink and the output terminal in the presence of the second logic state of the input signal to define the source impedance of the output terminal in the presence of the second logic state of the input signal.
An method for source terminating an output terminal on an integrated circuit having a calibrated source impedance comprising the steps of disposing in series with the output terminal an on-chip impedance with a value that is fixed to substantially equal an expected finite load impedance, which the on-chip impedance defines the source impedance to the integrated circuit at the output terminal.
A method for calibrating a plurality of calibrated impedance terminated output terminals on an integrated circuit which are operable to transmit data at a defined rate, comprising the steps of:
- associating an on-chip source impedance with each of the output terminals and each disposed internal to the integrated circuit to define the input impedance thereof;
- each of the on-chip source impedances variable in response to an associated control signal;
- and
- determining the value of the control signal for each of the on-chip source impedances with a calibration circuit, thereby defining the value of each of the on-chip source impedances in accordance with the calibration of the on-chip source impedances to calibrate for predetermined characteristics thereof.
Dependencies are inferred from the claim text.