Method for producing test patterns for testing an integrated circuit
AssigneeFreescale Semiconductor, Inc.
InventorsAlex S.Y. Koh, Alan Joseph Carlin, Kenneth Paul Tumin, Hubert Glenn Carson JR.
Life of this patent
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Abstract
A test pattern generation flow has a stimulus and a device under test (DUT) that operate together through a test bench. The test bench monitors and collects all the data necessary to generate a test program. This information is presented as a captured simulation that allows for ease of generating test software, as well as other simulations such as fault simulation and virtual test simulation. The complete and convenient information can be utilized to automate the development and/or easily manually develop and debug the test software.
Claims27
A method for capturing simulation output, comprising:
- providing a stimulus to a test bench;
- providing a device model corresponding to an integrated circuit to the test bench;
- and
- in response to applying the stimulus to the device model through the test bench, generating a captured simulation, the captured simulation comprising information related to at least one of strobe timing information, opcode information, mixed signal information, and internal memory content information.
A method for preparing a captured simulation for post-processing, comprising:
- receiving the captured simulation wherein the captured simulation comprises at least one of strobe timing information, opcode information, mixed signal information, and internal memory content information, the captured simulation generated in response to stimulus applied to a device model through a test bench;
- generating data patterns based at least in part on the one of strobe timing information, opcode information, mixed signal information, and internal memory content information, the data patterns capable of being retargettable for a plurality of post-processing tools;
- and
- providing a first formatted pattern file to a first post-processing tool, the first formatted pattern file based on the data patterns.
A data pattern generator stored via a computer readable medium, comprising:
- a first plurality of instructions for receiving the captured simulation wherein the captured simulation comprises at least one of strobe timing information, opcode information, mixed signal information, and internal memory content information, the captured simulation generated in response to stimulus applied to a device model through a test bench;
- a second plurality of instructions for generating data patterns based at least in part on the one of strobe timing information, opcode information, mixed signal information, and internal memory content information, the data patterns capable of being retargettable for a plurality of post-processing tools;
- and
- a third plurality of instructions for providing a first formatted pattern file to a first post-processing tool, the first formatted pattern file based on the data patterns.
A standard reusable test bench stored via a computer readable medium, comprising:
- a first plurality of instructions for receiving a stimulus;
- a second plurality of instructions for receiving a device model corresponding to an integrated circuit;
- and
- a third plurality of instructions for generating simulation parameters in response to applying the stimulus to the device model;
- a fourth plurality of instructions for creating a captured simulation based at least in part on the simulation parameters, the captured simulation comprising information related to at least one of strobe timing information, opcode information, mixed signal information, and internal memory content information.
Dependencies are inferred from the claim text.