Decoder capable of being employed in a resistance-array converting apparatus
AssigneeHynix Semiconductor Inc.
InventorJoon-Seok Lee
Life of this patent
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Abstract
A decoding apparatus using a precharging scheme is provided, where the size of an IC is minimized. The decoding apparatus may be used in a resistance array digital/analog converting apparatus implemented in an IC for driving a TFT-LCD to minimize the size of the IC. The disclosed decoding apparatus includes an input device for inputting digital data signals, a precharge device for precharging a plurality of output nodes with a first logic value in response to a precharge signal before the plurality of output nodes are enabled by a digital data signal provided from the input device, and a switch device for providing a second logic value to an output node from among the plurality of output nodes.
Claims25
A decoding apparatus, comprising:
- an input for inputting digital data signals;
- a switch for selecting an output node from among a plurality of output nodes in response to the digital data signals provided from the input;
- and
- a precharge circuit to precharge the plurality of output nodes in response to a precharge signal.
A resistance array digital/analog converting apparatus, comprising:
- a decoding circuit having a plurality of output nodes, wherein the decoding circuit comprises:
- an input for inputting digital data signals;
- a precharge circuit to precharge the plurality of output nodes in response to a precharge signal before the plurality of output nodes are enabled by a digital data signal provided from the input;
- and
- a first switch for selecting an output node from among the plurality of output nodes in response to the digital signals provided from the input;
- a gamma reference signal generating circuit for generating analog signals having a plurality of different levels;
- and
- a second switch for selecting one signal from the analog signals and outputting the selected signal in accordance with signals outputted from the decoding unit.
A decoding method, comprising:
- precharging a plurality of output nodes with a first logic value;
- providing a second logic value to an output node from among the plurality of output nodes according to a first inputted digital data signal;
- and
- protecting against an over-current path that is formed when the digital data signal is applied.
A method for performing resistance array digital/analog conversion, comprising:
- precharging a plurality of output nodes with a first logic value;
- providing a second logic value to the plurality of output nodes according to an inputted digital data signal;
- generating an analog signal having a plurality of different levels;
- and
- outputting a signal selected from the analog signals according to the second logic value.
Dependencies are inferred from the claim text.