Microelectronic device fabricating method, integrated circuit, and intermediate construction

A microelectronic device fabricating method comprising:

• providing a substrate having at least one beveled portion;
• forming a layer of structural material on the substrate, including on the at least one beveled portion;
• and
• removing only a portion of the structural material from the at least one beveled portion by anisotropic etching to form a device feature from the structural material on the at least one beveled portion.

A microelectronic device fabricating method comprising:

• providing a substrate having at least one beveled portion, wherein the bevel is less than or equal to about 45°;
• forming a layer of chemical reaction or diffusion barrier material over the substrate, including over the at least one beveled portion;
• forming a resist mask pattern over the barrier material;
• and
• with the mask pattern in place, anisotropically etching to form a pair of spaced, adjacent barrier material lines which are substantially void of residual shorting stringers extending therebetween.

A microelectronic device fabricating method comprising:

• providing a substrate with a base surface and a raised surface, the raised surface being raised out from the base surface and having at least one edge substantially perpendicular to the base surface and at least one beveled edge;
• forming a layer of structural material on at least the at least one perpendicular edge and the at least one beveled edge;
• and
• removing an effective amount of the structural material from the at least one beveled edge, the base surface, and the raised surface while leaving an effective amount of the structural material on the perpendicular edge to form an edge defined feature from the structural material on at least the at least one perpendicular edge.

A microelectronic device fabricating method comprising:

• providing a raised mandril over a substrate, the raised mandril being raised out from the substrate and having at least one edge substantially perpendicular to the substrate and at least one beveled edge;
• forming a layer of conductive material on at least the at least one perpendicular edge and the at least one beveled edge;
• anisotropically etching an effective amount of the conductive material from the at least one beveled edge, the substrate, and the mandril while leaving an effective amount of the conductive material on the perpendicular edge to form an edge defined feature from the conductive material on the at least one perpendicular edge;
• and
• removing substantially all of the mandril.

A microelectronic device fabricating method comprising:

• forming a resist mask pattern on a substrate, the resist pattern having at least one beveled portion at an edge of at least one opening in the resist pattern;
• transferring the resist pattern to the substrate to form at least one beveled portion of the substrate;
• forming a layer of structural material on at least the at least one beveled portion of the substrate;
• and
• removing at least a portion of the structural material from the at least one beveled portion by anisotropic etching to form a device feature from the structural material.

A microelectronic device fabricating method comprising:

• providing a layer of resist material on a substrate;
• exposing the resist to actinic energy providing gradated exposure of a second resist region;
• developing the resist to remove a first region, revealing the substrate, and a portion of the second region, without revealing the substrate, while leaving a third region in place to form a resist mask pattern on the substrate, wherein a beveled portion of the resist pattern forms in the second region;
• transferring the resist pattern to the substrate to form at least one beveled portion of the substrate;
• forming a layer of structural material on at least the at least one beveled portion of the substrate;
• and
• removing at least a portion of the structural material from the at least one beveled portion by anisotropic etching to form a device feature from the structural material.

An integrated circuit comprising:

• a) a semiconductive substrate;
• b) a layer of dielectric material over the substrate, the dielectric material layer having a base surface and a raised surface, the raised surface being raised out from the base surface and having at least one beveled edge and a step parallel to the base surface;
• and
• c) a pair of spaced, adjacent, chemical reaction or diffusion barrier material lines with a portion extending over the at least one beveled edge from the base surface to the step of the raised surface, wherein the spaced lines are substantially void of residual shorting stringers extending therebetween.

An intermediate construction of an integrated circuit comprising:

• a) a semiconductive substrate;
• b) a raised mandril over the substrate, the raised mandril being raised out from the substrate and having at least one edge substantially perpendicular to the substrate and at least one beveled edge;
• and
• c) a layer of structural material forming an edge defined feature on the at least one perpendicular edge.