Semiconductor device and method of manufacturing the same
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsRyuichi Kosugi, Shigeki Ohbayashi
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Abstract
A semiconductor device capable of a high-speed operation is provided. The semiconductor device is provided with low concentration impurity regions, a gate electrode formed with gate oxide film interposed between the gate electrode and a silicon substrate, an etching stopper, an interlayer insulating film having a contact hole and having an etching rate greater than that of the etching stopper, a high concentration impurity region formed by implanting an impurity into the silicon substrate through the contact hole, a plug layer filling the contact hole, and an interconnection layer.
Claims19
A semiconductor device, comprising:
- a semiconductor substrate;
- a pair of low concentration impurity regions having a relatively low impurity concentration and formed spaced apart from one another on a surface of said semiconductor substrate;
- a gate electrode formed between said pair of low concentration impurity regions and on said semiconductor substrate with a gate insulating film interposed therebetween;
- a protective film covering said gate electrode;
- an interlayer insulating film covering said gate electrode and said protective film, and having a hole reaching each of said low concentration impurity regions, and having an etching rate that is greater than an etching rate of said protective film when using a prescribed etchant;
- a high concentration impurity region having a relatively high impurity concentration within each of said low concentration impurity regions and being formed by implanting an impurity into said semiconductor substrate through said hole;
- and
- a conductive layer filling said hole such that electrical connection with said high concentration impurity region is established.
A semiconductor device, comprising:
- a semiconductor substrate having a conductive region;
- an interlayer insulating film having a hole reaching the conductive region on said semiconductor substrate;
- and
- a conductive layer filling said hole such that electrical connection with said conductive region is established, wherein
- said hole is defined by a relatively high sidewall and a relatively low sidewall of said interlayer insulating film.
A method of manufacturing a semiconductor device, comprising the steps of:
- forming a gate electrode on a semiconductor substrate with a gate insulating film interposed therebetween;
- implanting an impurity into said semiconductor substrate using said gate electrode as a mask to form a pair of low concentration impurity regions having a relatively low impurity concentration and being spaced apart from one another on a surface of said semiconductor substrate;
- forming a protective film covering said gate electrode and said semiconductor substrate;
- forming an interlayer insulating film covering said gate electrode and said protective film and having an etching rate greater than an etching rate of said protective film when using a prescribed etchant;
- etching said interlayer insulating film with a condition that an etching rate of said interlayer insulating film is greater than an etching rate of said protective film to expose said protective film, and thereafter, etching said protecting film with a condition that an etching rate of said protective film is greater than an etching rate of said interlayer insulating film to form a hole reaching each of said low concentration impurity regions in said interlayer insulating film;
- implanting an impurity into said semiconductor substrate through said hole to form a high concentration impurity region having a relatively high impurity concentration within each of said low concentration impurity regions;
- depositing a conductive material on said interlayer insulating film to fill said hole;
- and
- etching said conductive material while leaving said conductive material within said hole to form a conductive layer electrically connected to said high concentration impurity region.
A method of manufacturing a semiconductor device, comprising the steps of:
- forming an interlayer insulating film on a semiconductor substrate having a conductive region;
- etching said interlayer insulating film to form in said interlayer insulating film a hole that reaches said conductive region and that is defined by a pair of sidewalls opposing one another;
- forming a resist to cover one sidewall and to fill said hole;
- removing a portion of said interlayer insulating film using said resist as a mask such that other sidewall becomes lower in height;
- depositing a conductive material on said interlayer insulating film to fill said hole;
- and
- etching said conductive material while leaving said conductive material within said hole to form a conductive layer electrically connected to said conductive region.
Dependencies are inferred from the claim text.