Interconnect substrate with circuits for field-programmability and testing of multichip modules and hybrid circuits

Structure comprising:

• a substrate;
• a first plurality of conductive leads formed on said substrate in a first direction;
• a second plurality of conductive leads formed on said substrate in a second direction substantially different from said first direction;
• a number of programming elements for allowing selected conductive leads to be connected to other conductive leads or for allowing non-selected conductive leads to be disconnected from other conductive leads;
• a plurality of cells formed in said substrate, each cell having a number of bonding pads formed on the surface of said substrate above the region of said substrate in which said cell is formed thereby to allow a plurality of integrated circuit chips or electronic components to be attached to and electrically connected to said plurality of cells;
• and
• a plurality of devices formed in said substrate for programming all or a portion of said programming elements.

Structure comprising:

• a substrate;
• a first plurality of conductive leads formed on said substrate in a first direction;
• a second plurality of conductive leads formed on said substrate in a second direction substantially different from said first direction;
• a plurality of cells formed in said substrate, each cell having a number of bonding pads formed on the surface of said substrate above the region of said substrate in which said cell is formed thereby to allow a plurality of integrated circuit chips or electronic components to be attached to and electrically connected to said plurality of cells;
• and
• a plurality of devices formed in said substrate for testing said conductive leads or said plurality of integrated circuit chips or electronic components to be attached to and electrically connected to said plurality of cells.

Structure comprising:

• an interconnect substrate;
• a plurality of component contacts formed on said interconnect substrate for receipt of electronic components;
• a plurality of electrically conductive traces formed on said interconnect substrate, each trace being electrically connected to a corresponding one of said component contacts;
• and
• at least one integrated circuit mounted on a selected portion of said interconnect substrate, said at least one integrated circuit containing a plurality of conductive leads, at least one of said conductive leads being electrically connected to a corresponding one of said electrically conductive traces formed on said interconnect substrate, said at least one integrated circuit also containing a plurality of programming elements programmable to form electrically conductive paths between selected ones of said corresponding conductive leads on said at least one integrated circuit, said at least one integrated circuit thereby being configurable by a user to interconnect selected electrically conductive traces on said interconnect substrate to achieve a desired electrical function from the electronic components to be connected to said interconnect substrate.

Structure comprising:

• an interconnect substrate;
• a plurality of component contacts formed on said interconnect substrate for receipt of electronic components;
• a plurality of electrically conductive traces formed on said interconnect substrate, each trace being electrically connected to a corresponding one of said component contacts;
• and
• at least one integrated circuit mounted on a selected portion of said interconnect substrate, said at least one integrated circuit containing a plurality of conductive leads, at least one of said conductive leads being electrically connected to a corresponding one of said electrically conductive traces on said interconnect substrate, said at least one integrated circuit containing active devices for testing said conductive leads and said conductive traces or said electronic components to be mounted on corresponding one of said plurality of component contacts.

A programmable interconnect chip for use in interconnecting electronic components formed on an interconnect substrate, said chip comprising:

• a first set of conductive leads formed in a first direction across the surface of said chip, each of said conductive leads comprising one or more conductive segments, portions of selected ones of said segments being connected to pads on the surface of said programmable interconnect chip, each of said pads being adapted for contact to corresponding contact on the interconnect substrate;
• a second set of conductive leads formed on said programmable interconnect chip in a second direction not parallel to said first direction, each conductive lead in said second set of conductive leads comprising one or more segments;
• and
• means for electrically interconnecting selected ones of said conductive leads.

A diagnostic and test chip for use in testing electronic components and/or conductive traces formed on an interconnect substrate, said diagnostic and test chip comprising:

• means for providing access by a user to a first plurality of IO leads to said diagnostic and test chip and to a second plurality of IO leads to said diagnostic and test chip;
• first means for storing data input into said test chip by a user;
• means for sampling selected electronic components formed on said interconnect substrate to determine the state of these electronic components;
• means for comparing the data sampled from the said electronic components to the data stored in said first means for storing data to determine whether or not a match between said sampled and stored data has occurred;
• second means for storing the data available from said electronic components in response to a match being detected between the data stored in said first means for storing and the sampled data;
• and
• means for outputting the data stored in said second means for storing.

Structure comprising:

• a substrate;
• a first plurality of conductive leads formed on said substrate in a first direction;
• a second plurality of conductive leads formed on said substrate in a second direction substantially different from said first direction;
• and
• a plurality of cells formed in said substrate, each cell having a number of bonding pads formed on the surface of said substrate above the region of said substrate in which said cell is formed thereby to allow a plurality of integrated circuit chips or electronic components to be attached to and electrically connected to said plurality of cells.