US 2002/0162215 A1 · Method and apparatus for fabricating a circuit board with a three dimensional surface mounted array of semiconductor chips

Abstract

A method and apparatus for fabricating a three dimensional array of semiconductor chips is disclosed. The method uses a multiple step fabrication process that automates the surface mounting of semiconductor chips with unique chip carriers to achieve the three dimensional array of chips. The method includes a step of depositing solder on a multitude of chip carriers at one time, placing the chip carriers with chips on a printed circuit board and then running the board with chips and carriers arranged in a three dimensional array through a single reflow oven to complete a single reflow process to permanently connect all of the components. The apparatus includes a unique chip carrier pallet and print fixture pedestal that work in combination to position the chip carriers for the automatic deposition of solder on a multitude of carriers at once and then position them for addition to the circuit board.

Claims17

Dependent claims

A method for populating a circuit board with a three dimensional array of semiconductor chips comprising the steps of:

a) preparing a chip receiving side of a plurality of chip carriers to receive chips and passive components;
b) positioning said chip carriers over a first layer of chips positioned on said board so that said chip carriers make contact with preselected electrical contact points on said circuit board;
c) placing on each of said chip carriers a semiconductor chip with passive components;
and
d) interconnecting in a permanent fashion said chips, passive components and chip carriers to said circuit board.

2 more elements

A system for populating a circuit board with a three dimensional array of semiconductor chips comprising:

a) a plurality of chip carriers attachable to a circuit board with space for a chip to be positioned directly on said circuit board beneath each chip carrier as well as for positioning a chip on top of said chip carrier to thereby create a three dimensional array of chips on said circuit board;
and
b) a pallet for holding and moving said plurality of chip carriers during a circuit board assembly process, said pallet having a matrix of chambers in a frame like form with the chambers being open at least at a top side of said pallet, each chamber being formed to hold a chip carrier during the circuit board assembly process, said chip carriers being positioned in each of said chambers of the pallet with a top, chip receiving side, of said chip carrier facing out from the top of said pallet to thereby make said top side of said chip carrier accessible during the circuit board assembly process.

An apparatus for positioning and securely but detachably holding a chip module during a semiconductor fabrication process comprising:

a pallet for holding chip modules said pallet having a two dimensional matrix of chambers, said chambers being open at a first and second opposing parallel sides of said pallet, said chambers having said chambers being sized to accept and hold a chip carrier and said chambers further comprising a protective barrier to protect a chip carrier positioned within said chamber;
a print fixture pedestal with a two dimensional matrix of raised portions that match said matrix of said chambers of said pallet such that said raised portions are sized such that said raised portions fit on a one for one basis into said chambers of said pallet from said second side of said pallet;
and
wherein when said chambers are filled with chip modules and a said print fixture pedestal is joined with said pallet at said pallets second side said raised portions elevate chip modules located in said chambers to a work position from which they can be worked on from said first side of said pallet.

1 more element

Dependencies are inferred from the claim text.

Method and apparatus for fabricating a circuit board with a three dimensional surface mounted array of semiconductor chips

Life of this patent

Method and apparatus for fabricating a circuit board with a three dimensional surface mounted array of semiconductor chips

Life of this patent

Abstract

Claims17