System and method for correcting soft errors in random access memory devices

Abstract

A circuit and method are disclosed for reducing soft errors in dynamic memory devices using error checking and correcting. In an exemplary embodiment, a memory device includes a dual port memory having a first port for externally-initiated memory access operations and a second port for handling memory access operations associated with error checking and error correction operations. An error module, coupled to the second port of the dual port memory, performs an error checking operation on words read from the dual port memory. An error controller, coupled to the error module, controls the error module to perform error check operations on each word sequentially read from the dual port memory through the second port thereof. The error checking is performed substantially in parallel with externally-initiated memory access operations performed using the first port of the dual port memory. The error module may also generate a corrected word for a word that is detected by the error module as having a correctable error. The error controller may replace in the dual port memory the word having the correctable error with the corrected word.

Dependencies are inferred from the claim text.