Device to inhibit duplicate cache repairs
AssigneeHewlett-Packard Development Company, L.P.
InventorsBrian William Hughes, J. Michael Hill, Warren Kurt Howlett
Life of this patent
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Abstract
The present invention is directed to a system and method which manages one or more errors in a plurality of elements. The invention tests an element of the plurality of elements and detects the error in one of the elements. The invention then repairs a group of N elements, wherein N is greater than one and the group of N elements includes the element with the error. The invention inhibits subsequent repairs of the group of N elements.
Claims19
A method for managing an error in a plurality of elements, the method comprising:
- testing an element of the plurality of elements;
- detecting the error in the element;
- repairing a group of N elements of the plurality of elements, wherein N is greater than one and the group of N elements includes the element;
- and
- inhibiting subsequent repairing of the group of N elements.
A computer program product having a computer readable medium having computer program logic recorded thereon for managing an error in a plurality of elements, the computer program product comprising:
- means for locating an error in one element of the plurality of elements;
- means for replacing a group of N elements of the plurality of elements with replacement elements, wherein N is greater than one and the group of N elements includes the one element;
- and
- means for inhibiting subsequent operation of the means for replacing for the elements of the group of N elements.
A system for preventing duplicate cache memory repairs in an memory array of a plurality of memory elements, the system comprising:
- read circuitry that reads out the contents of a portion of the memory array, wherein the portion comprises at least two elements of the plurality of memory elements;
- compare circuitry that compares the contents with expected contents and detects an error in the portion;
- repair logic that repairs a group of N elements of the plurality of memory elements, wherein N is greater than one, and the group of N elements includes the portion;
- and
- inhibit circuitry that prevents the repair logic from subsequently operating on the group of N elements.
Dependencies are inferred from the claim text.