Method of writing to a RAM with column clear
AssigneeHewlett-Packard Development Company, L.P.
InventorSamuel D. Naffziger
Life of this patent
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AssigneeHewlett-Packard Development Company, L.P.
InventorSamuel D. Naffziger
Estimating the term…
An SRAM that has a column clear function with only three vertical lines and six total lines across a cell and a method of operating that cell and an array of those cells. Instead of two bit lines per port and two access devices per port as in a traditional SRAM cell, one bit line and one access device per port is used. In addition, one additional bit line, one additional word line, and two devices in series are used to perform the column clear operation and complete a write operation. The cell is operated by performing write operations using a two step process. To perform a write, each cell in a row to be written is preset during a first step. Then, each cell that is to have a zero written to it is cleared using the additional bit line and additional word line to address the cells to be cleared. A column of cells may be cleared by enabling all the rows for clearing, then asserting column clear control signals for each of the columns in the array to be cleared.
A method of writing to a RAM array with column clears, comprising:
A method writing a plurality of memory elements, comprising:
A method of writing to an array of memory cells arranged into rows and columns, comprising:
A method of writing to an array of memory cells, said array being arranged into rows and columns of memory cells, comprising:
Dependencies are inferred from the claim text.