Multiple virtual machine environment management system

An interrupt management system for an apparatus capable of running multiple concurrent virtual machines, comprising:

• a timer component comprising a plurality of virtual machine timers, said timer component further comprising an active virtual machine switch signal output;
• a multiple virtual machine control component, comprising an active virtual machine identification signal output;
• a processor component, coupled with said timer component;
• an interrupt controller component coupled with said processor component and with said timer component, said interrupt controller component comprising an active virtual machine identification signal input coupled with said active virtual machine identification signal output, said interrupt controller component also comprising an interrupt signal input;
• and
• a memory component storing interrupt handler code.

An interrupt controller for a multiple virtual machine environment, comprising:<

• an interrupt signal input;
• a plurality of virtual interrupt latch components coupled with said interrupt signal input;
• and
• a plurality of global interrupt mask registers;
• wherein each global interrupt mask register of said plurality of global interrupt mask registers is coupled with one of the virtual interrupt latch components.

A processor-based interrupt signal management system for a multiple virtual machine environment, comprising:

• an integrated circuit chip, comprising;
• a processor component;
• a multiple virtual machine management component coupled with said processor component, said multiple virtual machine management component comprising a plurality of virtual machine activation timer components;
• a memory component coupled with said processor component, said memory component comprising interrupt handler code;
• a memory access error input;
• an active virtual machine identification output;
• and
• a memory access location output;
• and
• an external memory protection component, not located on said integrated circuit chip, comprising an active virtual machine identification input and a memory access location input, said active virtual machine identification input coupled with said active virtual machine identification output and said memory access location input coupled with said memory access location output of said integrated circuit chip, said external memory protection component comprising a memory access error output, said memory access error output coupled with said memory access error input;
• wherein said external memory protection component indicates a memory access error via said memory access error output when said memory access location input indicates memory location not associated with a virtual machine identified by said active virtual machine identification output.