Method and apparatus for manufacturing semiconductor device
AssigneeHitachi, Ltd.
InventorsSouichi Katagiri, Ui Yamaguchi, Seiichi Kondo, Kan Yasui, Yoshio Kawamura
Life of this patent
Estimating the term…
Loading patent…
AssigneeHitachi, Ltd.
InventorsSouichi Katagiri, Ui Yamaguchi, Seiichi Kondo, Kan Yasui, Yoshio Kawamura
Estimating the term…
An apparatus comprising a fixed abrasive tool in which fine abrasive grains are uniformly dispersed and fixed, supply systems for processing liquids each containing an oxidizing agent, an organic acid, an inhibitor and purified water, and a sizing dresser capable of dressing the surface of the fixed abrasive tool at a constant size, and adapted to flow a processing liquid for polishing copper at a higher speed in the initial stage of processing, change the polishing liquid to another polishing liquid capable of polishing copper and barrier film substantially at an identical speed just before or just after the exposure of the barrier film and conduct conditioning during processing by driving the sizing dresser, the polishing method and the polishing apparatus enabling to decrease the cost in the existent CMP for planarization of copper wirings requiring two or more steps of CMP, as well as enabling to reduce dishing or erosion resulting in recesses for the wiring shape after planarization, which decrease the scattering in the wiring resistance value and reduce the short circuit or disconnection by the polishing residue of copper after planarization, and leads to improved yield.
A method for manufacturing a semiconductor device wherein for a substrate as a workpiece in which an insulation film is formed to the substrate, openings are formed in the insulation film, a first conductive film is formed in the inside of the openings and on the surface of the insulation film, and a second conductive film is formed on the first conductive film, by planarizing the second conductive film and part of the first conductive film using a fixed abrasive tool, the first and the second planarized conductive film are formed in the openings, said method comprising:
A method for manufacturing a semiconductor device wherein for a substrate as a workpiece in which an insulation film is formed to the substrate, openings are formed in the insulation film, a first conductive film is formed in the inside of the openings and on the surface of the insulation film, and a second conductive film is formed on the first conductive film, by planarizing the second conductive film and part of the first conductive film using a fixed abrasive tool, the first and the second planarized conductive film are formed in the openings, said method comprising:
A method for manufacturing a semiconductor device wherein for a substrate as a workpiece in which an insulation film is formed to the substrate, openings are formed in the insulation film, a first conductive film is formed in the inside of the openings and on the surface of the insulation film, and a second conductive film is formed on the first conductive film, by planarizing the second conductive film and part of the first conductive film using a fixed abrasive tool, the first and the second planarized conductive film are formed in the openings, said method comprising:
An apparatus for manufacturing a semiconductor device, the semiconductor device being planarized, including:
Dependencies are inferred from the claim text.