Phase-locked loop

A phase lock circuit(phase-locked loop circuit) having a signal path to which a phase comparator, a loop filter, a voltage control oscillator(voltage-controlled oscillator), a lock detector and a retraction circuit are connected, said phase comparator being adapted to compare the phase of an input signal VIN with the phase in the output signal of said voltage control oscillator and to output its result of comparison, said loop filter being adapted to receive the output signal of said phase comparator and to output a DC voltage;

• said voltage control oscillator being adapted to control the output oscillation frequency depending on the DC output voltage of said loop filter, said lock detector being adapted to judge whether the output signal of the said voltage control oscillator is locked or unlocked relative to said input signal VIN and to output the judgment result, said retraction circuit being a signal generator which is adapted to a scanning signal if said lock detector judges the unlocked state and to add the scanning signal to the voltage of said signal path, said phase lock circuit further comprising voltage tracking means for adding, to the voltage of said signal path, a signal causing the average voltage in the output voltage of said phase comparator to coincide with a predetermined reference voltage, whereby said voltage tracking means can enlarge the lock range in said phase lock circuit.