Mask configurable smart power circuits - applications and GF-NMOS devices
OwnerMaria Ines Castro Simas, Saulo Finco +4inventors
InventorsMaria Ines Castro Simas, Saulo Finco, Antonio Pedro Casimiro, Pedro Mendonca Santos, Frank Herman Behrens, Carlos Mammana
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Abstract
A mask-configurable smart power integrated circuit includes arrays of associated NMOS FETs that perform functions such as control, amplification and sampling of output variables. The arrays include NMOS basic cells using FET arrangements such as LDD, LDSD-NMOS, LDMOS, or N-channel DMOS. The smart power integrated circuits are useful to provide switching to power cells and drives, and protection from overload conditions.
Claims6
A versatile and programmable Smart Power IC, to provide switching power cells, their drives and protections and other required circuits to control, amplify and sample output variables to meet a wide range of applications requirements, characterized by:
- a) comprising Arrays aimed at Power Integrated Circuits (PICs), containing “intelligence” or not, based on the association of NMOS FETs, wherein said, NMOS structures, using a specific layout in a simple pattern, enabling to perform different functions required by Smart Power ICs;
- b) providing novel circuit Topologies to enable the control and power signals processing of PICs resorting only to wherein said NMOS structures in association with passive components within the same monolithic circuit or external to it;
- c) using wherein said NMOS based Basic Cells, which make use of an association of FETs, such as LDD or LDSD-NMOS or both, or LDMOS or N channel DMOS.
Dependencies are inferred from the claim text.