Salicide block for silicon-on-insulator (SOI) applications
AssigneeAdvanced Micro Devices, Inc.
InventorDavid Donggang Wu
Life of this patent
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Abstract
A method is provided, the method comprising forming a buffer layer above a structure layer, and forming a dielectric layer above the buffer layer. The method also comprises patterning the dielectric layer to form a salicide block above a portion of the structure layer protecting the portion from a subsequent salicidation. A device is also provided, the device comprising a buffer layer above a structure layer and a dielectric layer above the buffer layer. The dielectric layer is patterned to form a salicide block above a portion of the structure layer to protect the portion from a subsequent salicidation.
Claims30
A method comprising:
- forming a buffer layer above a structure layer;
- forming a dielectric layer above the buffer layer;
- and
- patterning the dielectric layer to form a salicide block above an undoped portion of the structure layer protecting the undoped portion from a subsequent salicidation.
A method comprising:
- forming a buffer layer above a silicon on insulator (SOI) structure layer;
- forming a dielectric layer above the buffer layer and adjacent a gate structure;
- and
- patterning the dielectric layer to form a salicide block above an undoped portion of the silicon on insulator (SOI) structure layer protecting the undoped portion from a subsequent salicidation.
A device comprising:
- a buffer layer above a structure layer;
- and
- a dielectric layer above the buffer layer, the dielectric layer patterned to form a salicide block above an undoped portion of the structure layer to protect the undoped portion from a subsequent salicidation.
Dependencies are inferred from the claim text.