Semiconductor integrated circuit
AssigneeKabushiki Kaisha Toshiba
InventorsToshiyuki Kouchi, Makoto Takahashi, Kenji Numata
Life of this patent
Estimating the term…
Abstract
A region of a memory macro function block is divided into memory core function block and interface function block regions. The interface function block includes a test circuit, a command decoder for a test, an address decoder for the test, a memory core input/output circuit which inputs a command and address into the memory core function block and transmits/receives data with the memory core function block, a configuration memory block in which information of a memory capacity of the memory core function block and configuration of a memory core is stored, and a configuration memory block which controls a data path and address path of the memory core function block based on the stored information.
Claims17
A semiconductor integrated circuit comprising:
- a memory macro function block having a function for reading/writing data;
- and
- a peripheral circuit having a function different from said function of said memory macro function block, said memory macro function block comprising:
- a memory core function block decodes respective addresses of a plurality of bit cells constituted on a memory cell array and reads/writes bit cell data;
- and
- an interface function block, a region of which is separated from a region of said memory core function block and which transmits/receives data with said peripheral circuit, said interface function block comprising:
- a test circuit which controls a function test of said memory core function block;
- a command decoder portion which decodes an input command for said function test of said memory core function block;
- an address decoder portion which decodes an input address for said function test of said memory core function block;
- a memory core input/output circuit which inputs said command and said address into said memory core function block and which transmits/receives data with said memory core function block;
- a configuration memory block in which data of a memory core configuration including a memory capacity, a command configuration, an address configuration, and an input/output configuration of said memory core function block is stored;
- and
- a configuration control block which controls a data path and an address path of said memory core function block based on stored information of said configuration memory block and which controls said memory core function block in a desired configuration.
Dependencies are inferred from the claim text.