Semiconductor memory apparatus
AssigneeSeiko Epson Corporation
InventorsKoichi Mizugaki, Eitaro Otsuka
Life of this patent
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Abstract
A semiconductor memory device includes: a first memory cell block and a second memory cell block, in each of which memory cells are arranged in a matrix; and a common preamplifier/write driver shared by the first memory cell block and the second memory cell block. The first memory cell block and the second memory cell block are aligned in a direction parallel to columns of the memory cells. The common preamplifier/write driver is located between the first memory cell block and the second memory cell block. This arrangement effectively attains chip size reduction of the semiconductor memory device.
Claims6
A semiconductor memory device, comprising:
- a first memory cell block and a second memory cell block, in each of which memory cells are arranged in a matrix;
- and
- a common preamplifier/write driver shared by the first memory cell block and the second memory cell block,
- wherein the first memory cell block and the second memory cell block are aligned in a direction parallel to columns of the memory cells, and
- the common preamplifier/write driver is located between the first memory cell block and the second memory cell block.
A semiconductor memory device, comprising:
- a first memory cell block and a second memory cell block, in each of which memory cells are arranged in a matrix;
- and
- a common column address decoder shared by the first memory cell block and the second memory cell block,
- wherein the first memory cell block and the second memory cell block are aligned in a direction parallel to columns of the memory cell, and
- the common column address decoder is located between the first memory cell block and the second memory cell block.
Dependencies are inferred from the claim text.