Programmable resistance memory array
AssigneeOvonyx, Inc.
InventorsTyler Lowrey, Guy C. Wicker
Life of this patent
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Abstract
A memory system, comprising: a memory cell comprising a programmable resistance element programmable to at least a first resistance state and a second resistance state. The memory cell interconnecting a row line and a column line. A power line, distinct from the row line and the column line, coupling said memory cell to a power source.
Claims21
A memory system, comprising:
- a memory cell comprising a programmable resistance element programmable to at least a first resistance state and a second resistance state, said memory cell interconnecting a row line and a column line;
- and
- a power line, distinct from said row line and said column line, coupling said memory cell to a power source.
A method of operating a memory cell, said memory cell interconnecting a column line and a row line, said memory cell including a programmable resistance element programmable to at least a first resistance state and a second resistance state, said programmable element having at least a first and second terminal, said first terminal coupled or selectively coupled to said column or said row line, said second terminal coupled or selectively coupled to a third line distinct from said column and row lines, said method comprising the steps of:
- reading data from said programmable element, said reading step comprising the step of developing a first potential difference across said programmable element;
- and
- writing data to said programmable element, said writing step comprising the step of developing a second potential difference across said programmable element.
Dependencies are inferred from the claim text.