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US 2002/0153973 A1Published application
Transconductance device employing native MOS transistors
AssigneeBroadcom Corporation
InventorStephen Allott
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AssigneeBroadcom Corporation
InventorStephen Allott
Estimating the term…
A system on chip such as a radio receiver has reduced suceptibility to voltages in the bulk silicon by using gyrator elements in the receiver with each gyrator element including a plurality of current sources interconnected to provide output transconductance voltages, and a variable load for the current sources including first and second load resistors each serially connected with one other plurality of current sources. A variable resistance interconnects nodes of the load resistors with the variable resistance comprising a pair of native MOS transistors having low threshold voltages. In a preferred embodiment the first and second load resistors comprise first and second MOS transistors with the pair of native transistors serially connected between source elements of the first and second MOS transistors.
A transconductance cell for use in a system on chip to reduce adverse effects of bulk semiconductor voltages on transconductance comprising a plurality of current sources interconnected to provide an output transconductance control voltage, and a variable load for the current sources including first and second load resistors each serially connected with one of the plurality of current sources, and a variable resistance interconnecting nodes of the load resistors, the variable resistance comprising a pair of native MOS transistors having low threshold voltages.
A method of reducing noise susceptibility due to bulk semiconductor voltages in a system on chip employing gyrators in filter elements comprising the steps of:
A gyrator comprising a plurality of current sources interconnected to provide output transconductance control voltages, and a variable load for the current sources including first and second load resistors, each serially connected with one of the plurality of current sources, and a variable resistance interconnecting nodes of the load resistors, the variable transistor resistance comprising a pair of native MOS transistors having low threshold voltages.
Dependencies are inferred from the claim text.