On-chip system with voltage level converting device for preventing leakage current due to voltage level difference

A voltage level converting device comprising:

• an input terminal for receiving an input signal of a first power supply voltage;
• a pair of cross-coupled transistors connected to a second supply voltage, a first node, and a second node;
• a first input transistor connected between the first node and ground voltage;
• a second input transistor connected between the second node and the ground voltage;
• and
• an input control circuit for preventing the first and second input transistors from being synchronously activated by an input signal in unstable status in response to a control signal applied from the outside, when the input signal is in unstable status.

An on-chip system comprising:

• a first module being operated at a first power supply voltage and blocked from the first power supply voltage in a power-off mode;
• a second module being operated at a second power supply voltage higher than the first power supply voltage and supplied with the second power supply voltage even in the power-off mode;
• and
• an interface circuit connected between the first and second modules, wherein the interface circuit comprises:
• a pair of cross-coupled transistors connected to the second power supply voltage, a first node, and a second node;
• first and second input transistors respectively connected between the first node and ground voltage, and the second node and the ground voltage;
• and
• an input control circuit for exclusively activating the first and second input transistors in response to a control signal applied from the outside when an input signal from the first module is in unstable status in the power-off mode.

An on-chip system comprising:

• a first module being operated at a first power supply voltage and blocked from the first power supply voltage in a power-off mode;
• a second module being operated at a second power supply voltage higher than the first power supply voltage and supplied with the second power supply voltage even in the power-off mode;
• and
• a plurality of voltage level converting circuits serially connected between the first and second modules, wherein each of the voltage level converting circuits comprises:
• a pair of cross-coupled transistors connected to the second power supply voltage, a first node, and a second node;
• first and second input transistors respectively connected between the first node and a third node, and the second node and the third node, wherein the first input transistor is controlled by an input signal provided from the first module and the second input transistor is controlled by an inverted signal of the input signal;
• an inverter connected to the first node for providing an output signal corresponding to the input signal;
• and
• a current path cut-off circuit connected between the third node and ground voltage for interrupting a current path between the third node and the ground voltage when an input signal of the respective level converting circuits is in unstable status in the power-off mode.

An on-chip system comprising:

• a first module being operated at a first power supply voltage and blocked from the first power supply voltage in a power-off mode;
• a second module being operated at a second power supply voltage higher than the first power supply voltage and supplied with the second power supply voltage even in the power-off mode;
• and
• a voltage level converting circuit connected between the first and second modules, wherein the voltage level converting circuit comprises:
• a pair of cross-coupled transistors connected to the second power supply voltage, a first node, and a second node;
• first and second input transistors respectively connected between the first node and a third node, and the second node and the third node, wherein the first input transistor is controlled by an input signal provided from the first module and the second input transistor is controlled by an inverted signal of the input signal;
• an AND gate receiving a signal from the first node and control signal from the outside, and providing an output signal corresponding to the input signal;
• and
• a current path cut-off circuit connected between the third node and ground voltage for interrupting a current path between the third node and the ground voltage when an input signal of the respective level converting circuits is in an unstable status in the power-off mode.