Method and system for maintaining full power during a power interruption in a multiple power supply system

A power supply system powered by separate line sources protected from power interruption comprising:

• a switching circuit coupled to the first and second AC sources and for receiving the power status signal;
• a first power supply coupled to a first AC power source and providing a first output;
• a second power supply coupled to a second AC power source and providing a second output wherein one of the first and second power supplies provides a power status signal;
• a switching circuit coupled to the first and second AC sources and for receiving the power status signal;
• and
• a third power supply having a third output, the third output being coupled to the first and second outputs, the third power supply also being coupled to the switching circuit to maintain full power when a power interruption occurs to one of the first and second power supplies.

A power supply system powered by separate line sources protected from power interruption comprising:

• a switching circuit coupled to the first and second AC sources and for receiving the power status signal;
• a first power supply coupled to a first AC power source and providing a first output;
• a second power supply coupled to a second AC power source and providing a second output wherein one of the first and second power supplies provides a power status signal;
• a switching circuit coupled to the first and second AC sources and for receiving the power status signal;
• and
• a third power supply having a third output, the third output being coupled to the first and second outputs, the third power supply also being coupled to the switching circuit to maintain full power when a power interruption occurs to one of the first and second power supplies, wherein the first, second, and third power supplies are coupled in a parallel arrangement, wherein the switching circuit further comprises a logic element, wherein the logic element comprises a converter, a transistor coupled to the logic element, wherein the logic element comprises an inverter, and a relay switch coupled to the transistor, the plurality of sources and the third power supply, wherein the logic element provides a gate voltage signal to the transistor, wherein when the transistor is on, the relay switch is energized to switch.