Ball grid array chip packages having improved testing and stacking characteristics
AssigneeMicron Technology, Inc.
InventorsWuu Yean Tay, Jeffrey Toh Tuck Fook
Life of this patent
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Abstract
A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low-profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned-in and tested in a more efficient and cost-effective manner than prior known BGA or FBGA semiconductor packages. A high-density, low-profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.
Claims8
A computer system comprising:
- an input device;
- an output device;
- a processor, coupled to the input and output devices;
- a memory module, coupled to the processor comprising:
- a module board having a first surface and a second surface, including the module board having at least one electrical circuit to be placed in electrical contact with at least one ball grid array semiconductor package;
- and
- at least one of the first and the second surfaces of the module board comprising:
- at least one first ball grid array semiconductor package attached to the at least one of the first and the second surfaces of the module board by a plurality of mutually complementary connective elements in electrical communication with the at least one electrical circuit of the module board, the at least one first ball grid array semiconductor package comprising:
- a substrate having a first surface, a second surface, and an aperture extending from the first surface through the substrate to the second surface, a plurality of substrate bond pads located on the first surface proximate to the aperture;
- the plurality of connective elements in electrical communication with the module board being attached to and extending from the second surface of the substrate being arranged in a preselected grid array pattern having at least one preselected pitch dimension between adjacent connective elements;
- a semiconductor device having an active surface and a plurality of bond pads thereon, the semiconductor device attached to the second surface of the substrate and positioned adjacent the module board;
- a plurality of bond wires extending through the aperture, each of the plurality of bond wires connecting one of the plurality of bond pads on the active surface of the semiconductor device with one of the plurality of substrate bond pads on the first surface of the substrate;
- the substrate including a plurality of mutually discrete electrically conductive circuit traces, each circuit trace of the plurality of circuit traces selectively extending from one of the plurality of substrate bond pads to one of the plurality of connective elements;
- and
- at least one second ball grid array semiconductor package having a substrate having at least one electrical circuit.
Dependencies are inferred from the claim text.