Multi-chip package
AssigneeWalton Advanced Electronics LTD
InventorsCecil Chang, Jansen Chiu
Life of this patent
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Abstract
A multi-chip package with a LOC lead frame is disclosed. Such a LOC lead frame has a plurality of leads, with each lead being divided into an inner portion and an outer connecting portion. A first tape adhering under the inner portions of the leads fastens the first chip and the first bonding wires electrically connect the first chip with the inner portions. A second tape adhering upon the inner portions of the leads fastens the second chip and the second bonding wires electrically connect the second chip with the inner portions. The second tape has a thickness so as to avoid the first bonding wires touching the second chip. The multi-chip package enables to package at least two chips by a LOC lead frame without turnover action during wire-bonding.
Claims8
A multi-chip package comprising
- a LOC lead frame possessing a plurality of leads, with each lead from inside to outside being divided into a first inner portion, a second inner portion and an outer connecting portion, where a downset is formed between the first inner portion and the second inner portion;
- a first chip locating beneath the first inner portions of the leads and has a plurality of bonding pads on its top surface;
- a first tape sticking the top surface of the first chip to the first inner portion of the leads;
- a plurality of first bonding wires electrically connecting the bonding pads of the first chip and the first inner portions of the corresponding leads;
- a second chip locating on the top of the first inner portions of the leads and having a plurality of bonding pads on its top surface;
- a second tape sticking the bottom surface of the second chip and the first inner portions of the leads in the LOC lead frame, the second tape having a thickness so as to avoid the first bonding wires contacting the bottom surface of the second chip;
- a plurality of second bonding wires electrically connecting the bonding pads of the second chip and the second inner portions of the corresponding leads;
- and
- a package body sealing the first chip, the second chip, the bonding wires and the first and second inner portions of the leads.
A multi-chip package comprising:
- a package body;
- a LOC lead frame having a plurality of leads, each lead including the inner portion and the outer connecting portion, the outer connecting portions extending outside the package body;
- a first chip locating beneath the inner portions of the leads and having a plurality of bonding pads on its top surface;
- a first tape sticking the top surface of the first chip and the inner portions of the leads;
- a plurality of first bonding wires electrically connecting the bonding pads of the first chip and the inner portions of the corresponding leads;
- a second chip locating above the inner portions of the leads and having a plurality of bonding pads on its top surface;
- a second tape sticking the bottom surface of the second chip to the inner portions of the leads, the second tape having a thickness so as to avoid the first bonding wires contacting the bottom surface of the second chip.
Dependencies are inferred from the claim text.