Bypass circuits for reducing plasma damage

Abstract

The present invention provides a method for reducing plasma damage to a gate oxide of a metal-oxide semiconductor (MOS) transistor positioned on a substrate of a MOS semiconductor wafer. The method begins with the formation of a dielectric layer covering the MOS transistor on the substrate. An etching process is then performed to form a first contact hole through the dielectric layer to a gate on the surface of the MOS transistor, as well as to form a second contact hole through the dielectric layer to an n-well in the substrate. A bypass circuit, positioned on the dielectric layer and the first and second contact holes, and a fusion area are then formed. The fusion area, electrically connecting with the bypass circuit, also electrically connects with the MOS transistor and the n-well thereafter. Ions produced during the process are thus transferred to the n-well via the conductive wire so as to reduce plasma damage to the gate oxide. The fusion area is finally disconnected after the formation of the MOS transistor.

Dependencies are inferred from the claim text.