High-speed stacked capacitor in SOI structure

Abstract

Implemented are a semiconductor device comprising a trench type capacitor having such a structure that a soft error tolerance is excellent, a contact resistance between an electrode and a metal wiring has a small value, a fringe capacitance on an end is reduced and area penalty is not increased, and a method for manufacturing the semiconductor device. The trench type capacitor is formed to have a bottom face in a BOX layer (2) without penetrating the BOX layer (2). Moreover, an end of the capacitor, that is, each of ends of a first electrode (6), a dielectric film (7) and a second electrode (8) is flattened. An insulating film (16) and a side wall (9) are formed to cover the ends of the first electrode (6), the dielectric film (7) and the second electrode (8). Furthermore, a contact plug (10) for connecting the second electrode (8) to a metal wiring (14a) provided as an upper layer is buried in a region surrounded by the side wall (9). Then, a metal silicide (12) and a metal nitride film (13) are formed in a connecting portion of the contact plug (10) and the metal wiring (14a).

Dependencies are inferred from the claim text.