Semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorShigeru Kusunoki
Life of this patent
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Abstract
Performance for a gate insulation film of an insulated gate transistor is enhanced. A depletion layer is generated in a region of a gate electrode 12 which is provided in contact with a gate insulation film 4 in an OFF state, and the depletion layer disappears or a width thereof is reduced in an ON state.
Claims19
A semiconductor device comprising a gate electrode provided opposite to a first semiconductor region where a channel is to be formed with a gate insulation film interposed therebetween,
- said gate electrode including a second semiconductor region which is provided in contact with said gate insulation film,
- wherein a depletion layer is generated in said second semiconductor region if said channel is insulating, and a width of said depletion layer is smaller than in the case where said channel is insulating or said depletion layer disappears if said channel is conducting.
A semiconductor device comprising a gate electrode provided opposite to a first semiconductor region where a channel is to be formed with a gate insulation film interposed therebetween,
- said gate electrode including a second semiconductor region which is provided in contact with said gate insulation film,
- wherein a depletion layer is generated in said second semiconductor region if said channel is conducting, and a width of said depletion layer is smaller than in the case where said channel is conducting or said depletion layer disappears if said channel is insulating, and
- said depletion layer is formed on a condition that a maximum voltage to be supplied to said semiconductor device is applied between said gate electrode and a source/drain electrode of said semiconductor device.
A semiconductor device, comprising:
- a first gate electrode having a first plane provided opposite to a first semiconductor region where a channel is to be formed with a first gate insulation film interposed therebetween;
- a second gate insulation film formed on a second plane of said first gate electrode which is provided opposite to said first plane;
- and
- a second gate electrode provided opposite to said first gate electrode through said second gate insulation film,
- wherein said second gate electrode has a second semiconductor region provided in contact with said second gate insulation film,
- a depletion layer is generated in said second semiconductor region if a first voltage is applied, and a width of said depletion layer is smaller than in the case where said first voltage is applied or said depletion layer disappears if a second voltage is applied, and
- said second voltage causes a more current to flow through said channel than said first voltage.
A capacitor comprising:
- a dielectric film having first and second principal planes;
- a first electrode provided on said first principal plane and formed of a semiconductor having a first conductivity type;
- and
- a second electrode provided on said second principal plane and formed of a semiconductor having a second conductivity type which is reverse to said first conductivity type;
- wherein said first and second electrodes have greater widths of depletion layers when a voltage making a P type semiconductor a positive potential and making an N type semiconductor a negative potential is not applied than when said voltage is applied.
Dependencies are inferred from the claim text.