Method for creating thick oxide on the bottom surface of a trench structure in silicon
AssigneeFairchild Semiconductor Corporation
InventorsHenry W. Hurst, James J. Murphy
Life of this patent
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Abstract
A gate isolation structure of a semiconductor device and method of making the same provides a trench in a silicon substrate, wherein a dielectric layer is formed on sidewalls and bottom of the trench, the dielectric layer having a first thickness on the sidewalls and a second thickness at the bottom that is greater than the first thickness. The thicker dielectric layer at the bottom substantially reduces gate charge to reduce the Miller Capacitance effect, thereby increasing the efficiency of the semiconductor device and prolonging its life.
Claims18
A gate isolation structure of a semiconductor device, comprising:
- a trench in a silicon substrate;
- and
- a dielectric layer formed on sidewalls and bottom of the trench, the dielectric layer having a first thickness on the sidewalls and a second thickness at the bottom that is greater than the first thickness.
A trench field effect transistor formed on a silicon substrate, the trench transistor comprising:
- a trench in a silicon substrate;
- a dielectric layer formed on sidewalls and bottom of the trench, the dielectric layer having a first thickness on the sidewalls and a second thickness at the bottom that is greater than the first thickness;
- and
- a gate conductive material substantially filling the trench.
A method of forming a gate dielectric layer of a trench field effect transistor, the method comprising the steps of:
- forming a trench extending into a substrate;
- forming a first layer of a dielectric material along sidewalls and bottom of the trench;
- and
- forming a second layer of the dielectric material at the bottom of the trench, whereby, the bottom of the trench is lined with dielectric material with a greater thickness than the dielectric material on the sidewalls of the trench.
Dependencies are inferred from the claim text.