US 2002/0153548 A1Published application

Semiconductor device and method of manufacturing the same

AssigneeFujitsu Limited

InventorsKazuhiro Mizutani, Michiari Kawano

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Abstract

There is provided a semiconductor device having a COB type DRAM, which comprises a first insulating film formed on a semiconductor substrate, first wiring trenches formed in a first insulating film in the first region, second wiring trenches formed in the first insulating film in the second region to have a substantially same depth as the first wiring trenches, first wirings buried in lower portions of the first wiring trenches, a second insulating film buried in upper portions of the first wiring trenches and formed of material different from the first insulating film, and second wirings formed of same conductive material as the first wirings in the second wiring trenches and formed thicker than the first wirings. Accordingly, the pattern precision of the bit lines and the wirings that have a different film thickness can be increased, and through holes that are formed between the bit lines in the self-alignment manner are formed shallow, and also resistances of the bit lines and the wirings are reduced.

Claims21

Dependent claims

A semiconductor device comprising:

a transistor consisting of a gate electrode formed on a first region of a semiconductor substrate via a gate insulating film, and a first impurity diffusion layer and a second impurity diffusion layer formed in the semiconductor substrate both sides of the gate electrode;
a conductive pattern formed in a second region of the semiconductor substrate;
a first insulating film formed above the transistor and the conductive pattern over the semiconductor substrate;
a first wiring trench formed in the first insulating film at a position higher than the transistor in the first region;
a second wiring trench formed in the first insulating film in the second region to have a substantially same depth as the first wiring trench;
a first hole formed in the first insulating film under the first wiring trench and above the first impurity diffusion layer of the transistor;
a first wiring buried in lower portion of the first wiring trench and connected electrically to the first impurity diffusion layer via the first hole;
a second insulating film buried in upper portion of the first wiring trench and formed of material different from the first insulating film;
and
a second wiring formed of same conductive material as the first wiring in the second wiring trench, and formed thicker than the first wiring, and connected electrically to the conductive pattern.

7 more elements

A method of manufacturing a semiconductor device comprising the steps of:

forming a gate electrode on a first region of a semiconductor substrate via a first insulating film;
forming a first impurity diffusion layer and a second impurity diffusion layer in the semiconductor substrate on both sides of the gate electrode;
forming a conductive pattern in or over a second region of the semiconductor substrate;
forming a first insulating film to cover a transistor and the conductive pattern over the semiconductor substrate;
forming a first hole above the first impurity diffusion layer in the first region by patterning the first insulating film;
forming a first wiring trench piled up the first hole in the first region by patterning the first insulating film;
forming a second wiring trench having a substantially same depth as the first wiring trench in the second region;
forming a conductive film in the first wiring trench and the second wiring trench and on the first insulating film;
removing the conductive film from an upper surface of the first insulating film to form a first wiring, that is formed of the conductive film in the first wiring trench and connected electrically to the first impurity diffusion layer via the first hole, and to form a second wiring, that is formed of the conductive film in the second wiring trench and connected to the conductive pattern;
forming space on the first wiring trench by thinning the first wiring;
forming a second insulating film, that is formed of material different from the first insulating film, in the first wiring trench and on the first insulating film;
and
thinning the second insulating film to leave it at least on the first wiring in the first wiring trench.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/173,595Filed 19 Jun 2002
Priority: JP 2000-23253031 Jul 2000
Published: 24 Oct 2002
Term ends: Not estimatedThe source records don’t support an estimate.

Classification14 codes

H10W 20/076
Of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers: in via holes or…
H10B 12/09
Manufacture or treatment: with simultaneous manufacture of the peripheral circuit region and memory cells
H10B 12/482
Data lines or contacts therefor: bit lines
H10W 20/031
Manufacture or treatment: of conductive parts of the interconnections

Family

Application09/756,222Division · filed 9 Jan 2001
Application10/173,595Division · filed 19 Jun 2002
US 2002/0014648 A1Published application
US 6,433,381 B1Related patent
US 6,794,244 B2Related patent
US 2002/0153548 A1This patent

From the US filing history. Foreign family members aren’t listed.