Semiconductor device
AssigneesHitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
InventorsKoji Hirata, Hiroyuki Takazawa
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AssigneesHitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
InventorsKoji Hirata, Hiroyuki Takazawa
Estimating the term…
To provide a super high-speed heterojunction bipolar transistor, a semiconductor device including such a heterojunction bipolar transistor has a structure wherein a subcollector layer, collector layer, base layer, emitter layer (InGaP layer) and emitter cap layer are successively formed in predetermined shapes a surface of a semi-insulating GaAs substrate, an inner edge part of a base electrode overlaps a periphery of the emitter layer, and the base electrode is electrically connected to the base layer by an alloy layer formed by alloying the emitter layer under the base electrode. The emitter layer is selectively formed on the base layer. The base electrode extends from the peripheral part of the emitter layer across the base layer, and the alloy layer extends to a midway depth of the base layer. The edge of the base layer is situated further inside than the outer edge of the base electrode.
A semiconductor device comprising a heterojunction bipolar transistor comprising a subcollector layer, collector layer, base layer, emitter layer and emitter cap layer successively formed in predetermined shapes on one surface of a semiconductor substrate, the transistor having a structure wherein an inner edge part of a base electrode overlaps the periphery of said emitter layer, and said base electrode is electrically connected to said base layer by an alloy layer formed by alloying said emitter layer under the base electrode, said emitter layer is selectively formed on said base layer, said base electrode extends from the peripheral part of said emitter layer across said base layer, and said alloy layer extends to a midway depth of said base layer.
A semiconductor device comprising a heterojunction bipolar transistor comprising a subcollector layer, collector layer, base layer, emitter layer and emitter cap layer successively formed in predetermined shapes on one surface of a semiconductor substrate, the transistor having a structure wherein an inner edge part of a base electrode overlaps the periphery of said emitter layer, and said base electrode is electrically connected to said base layer by an alloy layer formed by alloying said emitter layer under the base electrode, wherein the edge of said base layer is situated further inside than the edge of said emitter layer, and said base electrode does not come in direct contact with said base layer.
A method of fabricating a semiconductor device wherein a heterojunction bipolar transistor is fabricated by successively forming semiconductor layers comprising a subcollector layer, collector layer, base layer, emitter layer and emitter cap layer on one surface of a semiconductor substrate, said subcollector layer, collector layer, base layer, emitter layer and emitter cap layer are formed by etching a predetermined semiconductor layer of said semiconductor layers in a predetermined pattern, an emitter electrode is formed on said emitter layer, a base electrode is formed whereof an inner edge part overlaps the periphery of said emitter layer, a collector electrode is formed on said collector layer, and the base electrode is electrically connected to the base layer via an alloy layer by alloying the emitter layer under said base electrode, said method comprising the steps of:
A method of fabricating a semiconductor device wherein a heterojunction bipolar transistor is fabricated by successively forming semiconductor layers comprising a subcollector layer, collector layer, base layer, emitter layer and emitter cap layer on one surface of a semiconductor substrate, said subcollector layer, collector layer, base layer, emitter layer and emitter cap layer are formed by etching a predetermined semiconductor layer of said semiconductor layers in a predetermined pattern, an emitter electrode is formed on said emitter layer, a base electrode is formed whereof an inner edge part overlaps the periphery of said emitter layer, a collector electrode is formed on said collector layer, and the base electrode is electrically connected to the base layer via an alloy layer by alloying the emitter layer under said base electrode, said method comprising the steps of:
Dependencies are inferred from the claim text.