US 2002/0121934 A1 · Output stage and method of enhancing output gain

Abstract

The present invention provides for an output stage which couples with an input stage and is configured to limit a reflection current which is reflected back into the input stage to enhanced an output voltage to drive a variety of loads. The present output stage limits the reflection current by compensating for at least one bias current at the input stage output. The output stage further reduced a quiescent current needed to maintain the output stage in an active state without adversely affecting the output voltage supplied to the load. The output stage includes a first and second current driving stage, a first and second current compensation circuit and an output circuit. The first and second current driving stages couple with both the input stage and the output circuit. The first and second current driving stages are configured to generate a first and second driving current, respectively, to drive the output circuit, wherein the first driving current is proportional to a first bias current and the second driving current is proportional to a second bias current. To limit reflection current the first current compensation circuit is configured to compensate for the first bias current while the second current compensation circuit is configured to compensate for the second bias current.

Claims39

Dependent claims

An output stage configured to receive an input stage output and to generate a stable output to a variety of loads, the output stage comprising:

a first and second current driving stage, a first and second current compensation circuit and an output circuit;
the first driving stage coupled with an input stage and the output circuit, and configured to generate a first driving current proportional with a first bias current based on the input stage output, to drive the output circuit;
the second driving stage coupled with the input stage and the output circuit, and configured to generate a second driving current proportional with a second bias current based on the input stage output, to drive the output circuit;
the first current compensation circuit coupled with the first driving stage and the input stage, and configured to compensate for the first bias current to limit a reflection current back into the input stage;
and
the second current compensation circuit coupled with the second driving stage and the input stage, and configured to compensate for the second bias current to further limit the reflection current back into the input stage.

3 more elements

An amplifier output stage, comprising:

a first current compensation circuit coupled with an amplifier input stage output and a first driving stage, and configured to compensate for a first bias current of the first driving stage at the amplifier input stage output to minimize reflection current back into the amplifier input stage;
and
a second current compensation circuit coupled with the amplifier input stage output and a second driving stage, and configured to compensate for a second bias current of the second driving stage at the amplifier input stage output to further minimize the reflection current back into the amplifier input stage.

An amplifier output stage configured to receive an amplifier input stage output and to generate a stable output to a variety of loads, the amplifier output stage comprising:

a first and second current compensation circuit coupled with an amplifier input stage output;
the first current compensation circuit coupled with an amplifier input stage output, and configured to compensate for a first bias current to limit a reflection current back into the amplifier input stage;
and
the second current compensation circuit coupled with the amplifier input stage output, and configured to compensate for a second bias current to further limit the reflection current back into the amplifier input stage.

1 more element

Dependencies are inferred from the claim text.

Output stage and method of enhancing output gain

Life of this patent

Output stage and method of enhancing output gain

Life of this patent

Abstract

Claims39